• Rick Chen's avatar
    riscv: Fix clear bss loop in the start-up code · 444c4641
    Rick Chen authored
    
    
    For RV64, it will use sd instruction to clear t0
    register, and the increament will be 8 bytes. So
    if the difference between__bss_strat and __bss_end
    was not 8 bytes aligned, the clear bss loop will
    overflow and acks like system hang.
    Signed-off-by: default avatarRick Chen <rick@andestech.com>
    Cc: KC Lin <kclin@andestech.com>
    Cc: Alan Kao <alankao@andestech.com>
    444c4641
start.S 8.12 KB