Commit 158f11bc authored by Bob Beckett's avatar Bob Beckett
Browse files

board: ge: bx50v3, imx53ppd: use DM I2C



Remove old (pre-DM) i2c setup code.
Enable DM i2c.
board: ge: convert vpd to use i2c eeprom
Convert common code to use DM rtc.
Convert the generic i2c PMIC init code to use the new da9063 driver.

mx53ppd only:
Enable MXC DM i2c driver.
Define CONFIG_SYS_MALLOC_F_LEN so that DM is available in pre-reloc.
Make GPIO banks available during preloc, since initialisation is done
in board_early_init_f().
Add gpio_request() calls to satisfy the DM_GPIO compatibility API.
Remove unused power configuration.

Note: this is a squash of a few commits due to dropping of i2c compat
api
Signed-off-by: Bob Beckett's avatarRobert Beckett <bob.beckett@collabora.com>
Signed-off-by: Ian Ray's avatarIan Ray <ian.ray@ge.com>
parent 8117b012
......@@ -26,3 +26,23 @@
};
};
};
&gpio1 {
u-boot,dm-pre-reloc;
};
&gpio2 {
u-boot,dm-pre-reloc;
};
&gpio3 {
u-boot,dm-pre-reloc;
};
&gpio4 {
u-boot,dm-pre-reloc;
};
&gpio5 {
u-boot,dm-pre-reloc;
};
......@@ -15,6 +15,4 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "ge_bx50v3"
source "board/ge/common/Kconfig"
endif
......@@ -14,7 +14,6 @@
#include <linux/errno.h>
#include <linux/libfdt.h>
#include <asm/gpio.h>
#include <asm/mach-imx/mxc_i2c.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/mach-imx/boot_mode.h>
#include <asm/mach-imx/video.h>
......@@ -27,7 +26,8 @@
#include <asm/arch/crm_regs.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
#include <i2c.h>
#include <power/regulator.h>
#include <power/da9063_pmic.h>
#include <input.h>
#include <pwm.h>
#include <version.h>
......@@ -85,45 +85,6 @@ static iomux_v3_cfg_t const uart4_pads[] = {
MX6_PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
};
static struct i2c_pads_info i2c_pad_info1 = {
.scl = {
.i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL | I2C_PAD,
.gpio_mode = MX6_PAD_CSI0_DAT9__GPIO5_IO27 | I2C_PAD,
.gp = IMX_GPIO_NR(5, 27)
},
.sda = {
.i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA | I2C_PAD,
.gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26 | I2C_PAD,
.gp = IMX_GPIO_NR(5, 26)
}
};
static struct i2c_pads_info i2c_pad_info2 = {
.scl = {
.i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | I2C_PAD,
.gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | I2C_PAD,
.gp = IMX_GPIO_NR(4, 12)
},
.sda = {
.i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | I2C_PAD,
.gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | I2C_PAD,
.gp = IMX_GPIO_NR(4, 13)
}
};
static struct i2c_pads_info i2c_pad_info3 = {
.scl = {
.i2c_mode = MX6_PAD_GPIO_3__I2C3_SCL | I2C_PAD,
.gpio_mode = MX6_PAD_GPIO_3__GPIO1_IO03 | I2C_PAD,
.gp = IMX_GPIO_NR(1, 3)
},
.sda = {
.i2c_mode = MX6_PAD_GPIO_6__I2C3_SDA | I2C_PAD,
.gpio_mode = MX6_PAD_GPIO_6__GPIO1_IO06 | I2C_PAD,
.gp = IMX_GPIO_NR(1, 6)
}
};
static void setup_iomux_uart(void)
{
imx_iomux_v3_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads));
......@@ -491,10 +452,6 @@ static void set_confidx(const struct vpd_cache* vpd)
int board_init(void)
{
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info3);
if (!read_vpd(&vpd, vpd_callback)) {
int ret, rescan;
......@@ -541,53 +498,26 @@ static const struct boot_mode board_boot_modes[] = {
void pmic_init(void)
{
#define I2C_PMIC 0x2
#define DA9063_I2C_ADDR 0x58
#define DA9063_REG_BCORE2_CFG 0x9D
#define DA9063_REG_BCORE1_CFG 0x9E
#define DA9063_REG_BPRO_CFG 0x9F
#define DA9063_REG_BIO_CFG 0xA0
#define DA9063_REG_BMEM_CFG 0xA1
#define DA9063_REG_BPERI_CFG 0xA2
#define DA9063_BUCK_MODE_MASK 0xC0
#define DA9063_BUCK_MODE_MANUAL 0x00
#define DA9063_BUCK_MODE_SLEEP 0x40
#define DA9063_BUCK_MODE_SYNC 0x80
#define DA9063_BUCK_MODE_AUTO 0xC0
uchar val;
i2c_set_bus_num(I2C_PMIC);
i2c_read(DA9063_I2C_ADDR, DA9063_REG_BCORE2_CFG, 1, &val, 1);
val &= ~DA9063_BUCK_MODE_MASK;
val |= DA9063_BUCK_MODE_SYNC;
i2c_write(DA9063_I2C_ADDR, DA9063_REG_BCORE2_CFG, 1, &val, 1);
i2c_read(DA9063_I2C_ADDR, DA9063_REG_BCORE1_CFG, 1, &val, 1);
val &= ~DA9063_BUCK_MODE_MASK;
val |= DA9063_BUCK_MODE_SYNC;
i2c_write(DA9063_I2C_ADDR, DA9063_REG_BCORE1_CFG, 1, &val, 1);
i2c_read(DA9063_I2C_ADDR, DA9063_REG_BPRO_CFG, 1, &val, 1);
val &= ~DA9063_BUCK_MODE_MASK;
val |= DA9063_BUCK_MODE_SYNC;
i2c_write(DA9063_I2C_ADDR, DA9063_REG_BPRO_CFG, 1, &val, 1);
i2c_read(DA9063_I2C_ADDR, DA9063_REG_BIO_CFG, 1, &val, 1);
val &= ~DA9063_BUCK_MODE_MASK;
val |= DA9063_BUCK_MODE_SYNC;
i2c_write(DA9063_I2C_ADDR, DA9063_REG_BIO_CFG, 1, &val, 1);
i2c_read(DA9063_I2C_ADDR, DA9063_REG_BMEM_CFG, 1, &val, 1);
val &= ~DA9063_BUCK_MODE_MASK;
val |= DA9063_BUCK_MODE_SYNC;
i2c_write(DA9063_I2C_ADDR, DA9063_REG_BMEM_CFG, 1, &val, 1);
i2c_read(DA9063_I2C_ADDR, DA9063_REG_BPERI_CFG, 1, &val, 1);
val &= ~DA9063_BUCK_MODE_MASK;
val |= DA9063_BUCK_MODE_SYNC;
i2c_write(DA9063_I2C_ADDR, DA9063_REG_BPERI_CFG, 1, &val, 1);
struct udevice *reg;
int ret, i;
static const char * const bucks[] = {
"bcore1",
"bcore2",
"bpro",
"bmem",
"bio",
"bperi",
};
for (i = 0; i < ARRAY_SIZE(bucks); i++) {
ret = regulator_get_by_devname(bucks[i], &reg);
if (reg < 0) {
printf("%s(): Unable to get regulator %s: %d\n",
__func__, bucks[i], ret);
continue;
}
regulator_set_mode(reg, DA9063_BUCKMODE_SYNC);
}
}
int board_late_init(void)
......
config SYS_VPD_EEPROM_I2C_ADDR
hex "I2C address of the EEPROM device used for VPD"
help
VPD = Vital Product Data
config SYS_VPD_EEPROM_I2C_BUS
int "I2C bus of the EEPROM device used for VPD."
config SYS_VPD_EEPROM_SIZE
int "Size in bytes of the EEPROM device used for VPD"
config SYS_VPD_EEPROM_I2C_ADDR_LEN
int "Number of bytes to use for VPD EEPROM address"
default 1
......@@ -5,27 +5,24 @@
#include <common.h>
#include <env.h>
#include <i2c.h>
#include <dm/uclass.h>
#include <rtc.h>
void check_time(void)
{
struct udevice *dev;
int ret, i;
struct rtc_time tm;
u8 retry = 3;
unsigned int current_i2c_bus = i2c_get_bus_num();
ret = i2c_set_bus_num(CONFIG_SYS_RTC_BUS_NUM);
if (ret < 0) {
ret = uclass_get_device(UCLASS_RTC, 0, &dev);
if (ret) {
env_set("rtc_status", "FAIL");
return;
}
rtc_init();
for (i = 0; i < retry; i++) {
ret = rtc_get(&tm);
ret = dm_rtc_get(dev, &tm);
if (!ret || ret == -EINVAL)
break;
}
......@@ -40,7 +37,7 @@ void check_time(void)
tm.tm_year = 2036;
for (i = 0; i < retry; i++) {
ret = rtc_set(&tm);
ret = dm_rtc_set(dev, &tm);
if (!ret)
break;
}
......@@ -55,7 +52,5 @@ void check_time(void)
env_set("rtc_status", "2038");
else
env_set("rtc_status", "OK");
i2c_set_bus_num(current_i2c_bus);
}
......@@ -8,6 +8,9 @@
#include <i2c.h>
#include <linux/bch.h>
#include <stdlib.h>
#include <dm/uclass.h>
#include <i2c_eeprom.h>
#include <hexdump.h>
/* BCH configuration */
......@@ -200,28 +203,34 @@ int read_vpd(struct vpd_cache *cache,
int (*process_block)(struct vpd_cache *, u8 id, u8 version,
u8 type, size_t size, u8 const *data))
{
static const size_t size = CONFIG_SYS_VPD_EEPROM_SIZE;
int res;
struct udevice *dev;
int ret;
u8 *data;
unsigned int current_i2c_bus = i2c_get_bus_num();
int size;
ret = uclass_get_device_by_name(UCLASS_I2C_EEPROM, "vpd", &dev);
if (ret)
return ret;
res = i2c_set_bus_num(CONFIG_SYS_VPD_EEPROM_I2C_BUS);
if (res < 0)
return res;
size = i2c_eeprom_size(dev);
if (size < 0) {
printf("Unable to get size of eeprom: %d\n", ret);
return ret;
}
data = malloc(size);
if (!data)
return -ENOMEM;
res = i2c_read(CONFIG_SYS_VPD_EEPROM_I2C_ADDR, 0,
CONFIG_SYS_VPD_EEPROM_I2C_ADDR_LEN,
data, size);
if (res == 0)
res = vpd_reader(size, data, cache, process_block);
ret = i2c_eeprom_read(dev, 0, data, size);
if (ret) {
free(data);
return ret;
}
ret = vpd_reader(size, data, cache, process_block);
free(data);
i2c_set_bus_num(current_i2c_bus);
return res;
return ret;
}
......@@ -13,6 +13,4 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "mx53ppd"
source "board/ge/common/Kconfig"
endif
......@@ -125,34 +125,6 @@ static void setup_iomux_fec(void)
imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
}
#define I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \
PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
static void setup_iomux_i2c(void)
{
static const iomux_v3_cfg_t i2c1_pads[] = {
NEW_PAD_CTRL(MX53_PAD_CSI0_DAT8__I2C1_SDA, I2C_PAD_CTRL),
NEW_PAD_CTRL(MX53_PAD_CSI0_DAT9__I2C1_SCL, I2C_PAD_CTRL),
};
imx_iomux_v3_setup_multiple_pads(i2c1_pads, ARRAY_SIZE(i2c1_pads));
}
#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL)
static struct i2c_pads_info i2c_pad_info1 = {
.scl = {
.i2c_mode = MX53_PAD_EIM_D21__I2C1_SCL | I2C_PAD,
.gpio_mode = MX53_PAD_EIM_D28__GPIO3_28 | I2C_PAD,
.gp = IMX_GPIO_NR(3, 28)
},
.sda = {
.i2c_mode = MX53_PAD_EIM_D28__I2C1_SDA | I2C_PAD,
.gpio_mode = MX53_PAD_EIM_D21__GPIO3_21 | I2C_PAD,
.gp = IMX_GPIO_NR(3, 21)
}
};
static int clock_1GHz(void)
{
int ret;
......@@ -182,8 +154,10 @@ void ppd_gpio_init(void)
int i;
imx_iomux_v3_setup_multiple_pads(ppd_pads, ARRAY_SIZE(ppd_pads));
for (i = 0; i < ARRAY_SIZE(ppd_gpios); ++i)
for (i = 0; i < ARRAY_SIZE(ppd_gpios); ++i) {
gpio_request(ppd_gpios[i].gpio, "request");
gpio_direction_output(ppd_gpios[i].gpio, ppd_gpios[i].value);
}
}
int board_early_init_f(void)
......@@ -256,9 +230,6 @@ int board_init(void)
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
mxc_set_sata_internal_clock();
setup_iomux_i2c();
setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
return 0;
}
......
......@@ -104,6 +104,7 @@ static void lcd_enable(void)
pwm_config(1, 5000000, 5000000);
/* Backlight Power */
gpio_request(BACKLIGHT_ENABLE, "BACKLIGHT_ENABLE");
gpio_direction_output(BACKLIGHT_ENABLE, 1);
pwm_enable(1);
......
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_SYS_VPD_EEPROM_I2C_ADDR=0x50
CONFIG_SYS_VPD_EEPROM_I2C_BUS=4
CONFIG_SYS_VPD_EEPROM_SIZE=1024
CONFIG_TARGET_GE_BX50V3=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
......@@ -49,6 +46,12 @@ CONFIG_BOOTCOUNT_EXT=y
CONFIG_BOOTCOUNT_BOOTLIMIT=10
CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="1:5"
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_DM_MMC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
......@@ -64,6 +67,12 @@ CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_PWM_IMX=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_DA9063=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_DA9063=y
CONFIG_DM_RTC=y
CONFIG_RTC_RX8010SJ=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
......
......@@ -2,9 +2,6 @@ CONFIG_ARM=y
CONFIG_ARCH_MX5=y
CONFIG_SYS_TEXT_BASE=0x77800000
CONFIG_TARGET_MX53PPD=y
CONFIG_SYS_VPD_EEPROM_I2C_ADDR=0x50
CONFIG_SYS_VPD_EEPROM_I2C_BUS=2
CONFIG_SYS_VPD_EEPROM_SIZE=1024
CONFIG_ENV_SIZE=0x2800
CONFIG_ENV_OFFSET=0xC0000
CONFIG_NR_DRAM_BANKS=2
......@@ -41,6 +38,13 @@ CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_EXT=y
CONFIG_BOOTCOUNT_BOOTLIMIT=10
CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="0:5"
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
......@@ -48,6 +52,7 @@ CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX5=y
CONFIG_PWM_IMX=y
CONFIG_DM_RTC=y
CONFIG_RTC_S35392A=y
CONFIG_USB=y
CONFIG_USB_EHCI_MX5=y
......@@ -61,3 +66,4 @@ CONFIG_SYSRESET=y
CONFIG_SYSRESET_WATCHDOG=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_USB=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
......@@ -189,33 +189,6 @@
#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
#define CONFIG_RTC_RX8010SJ
#define CONFIG_SYS_RTC_BUS_NUM 2
#define CONFIG_SYS_I2C_RTC_ADDR 0x32
/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_MXC_I2C1
#define CONFIG_SYS_I2C_MXC_I2C2
#define CONFIG_SYS_I2C_MXC_I2C3
#define CONFIG_SYS_NUM_I2C_BUSES 11
#define CONFIG_SYS_I2C_MAX_HOPS 1
#define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
{1, {I2C_NULL_HOP} }, \
{2, {I2C_NULL_HOP} }, \
{0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \
{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
{0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
{0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
{0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
{0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \
{0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \
}
#define CONFIG_BCH
#endif /* __GE_BX50V3_CONFIG_H */
......@@ -43,25 +43,6 @@
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
#define CONFIG_SYS_RTC_BUS_NUM 2
#define CONFIG_SYS_I2C_RTC_ADDR 0x30
/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* PMIC Controller */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_DIALOG_POWER
#define CONFIG_POWER_FSL
#define CONFIG_POWER_FSL_MC13892
#define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAUDRATE 115200
......@@ -188,22 +169,6 @@
#define CONFIG_CMD_FUSE
#define CONFIG_FSL_IIM
#define CONFIG_SYS_I2C_SPEED 100000
/* I2C1 */
#define CONFIG_SYS_NUM_I2C_BUSES 9
#define CONFIG_SYS_I2C_MAX_HOPS 1
#define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
{0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \
{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
{0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
{0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
{0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
{0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \
{0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \
}
#define CONFIG_BCH
/* Backlight Control */
......
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