- 12 Apr, 2019 40 commits
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Christophe Kerello authored
This patch adds the documentation of the device tree bindings for the STM32 FMC2 NAND controller. Signed-off-by:
Christophe Kerello <christophe.kerello@st.com> Reviewed-by:
Patrick DELAUNAY <patrick.delaunay@st.com>
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Christophe Kerello authored
We are facing issues in the driver since SPI NOR framework has moved on SPI MEM framework, and SPI NAND framework is not running properly with the current driver. To be able to solve issues met on SPI NOR Flashes and to be able to support SPI NAND Flashes, the driver has been reworked. We are now using exec_op ops instead of using xfer ops. Thanks to this rework, the driver has been successfully tested with: - mx66l51235l SPI NOR Flash on stm32f746 SOC - n25q128a SPI NOR Flash on stm32f769 SOC - mx66l51235l SPI NOR Flash on stm32mp1 SOC - mt29f2g01abagd SPI NAND Flash on stm32mp1 SOC Signed-off-by:
Christophe Kerello <christophe.kerello@st.com> Tested-by:
Patrick DELAUNAY <patrick.delaunay@st.com> Reviewed-by:
Patrick DELAUNAY <patrick.delaunay@st.com>
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Patrick Delaunay authored
Adds alias to set the pincontrol seq id. For STMFX gpio expander, force sequence number after the last bank (GPIOZ) to avoid conflict between STM32MP and STMFX gpio bank sequence number. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by:
Patrice Chotard <patrice.chotard@st.com>
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Patrice Chotard authored
In order to insure that hog GPIOs are configured early during the boot process, force all pinctrl driver probing in board_init(). Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by:
Patrice Chotard <patrice.chotard@st.com>
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Patrick Delaunay authored
Activate PINCTRL_STMFX and needed part for generic pincontrol PINCTRL_FULL, PINCONF. Increase pre-reloc memory for MALLOC (needed for each DM pinconfig node). Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by:
Patrice Chotard <patrice.chotard@st.com>
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Patrick Delaunay authored
This patch adds pinctrl/GPIO driver for STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander. STMFX is an I2C slave controller, offering up to 24 GPIOs. The driver relies on UCLASS_PINCTRL and UCLASS_GPIO. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by:
Patrice Chotard <patrice.chotard@st.com>
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Patrice Chotard authored
Add adc related nodes. These nodes are used to detect the current supplied by USB type-C power in port on DK1 and DK2 boards. Signed-off-by:
Patrice Chotard <patrice.chotard@st.com>
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Patrice Chotard authored
For DK1/DK2 boards, check if power supply provides enough current to allow the board to boot correctly. ADC@0 channel 18 and 19 are connected to USB type-C CC1 and CC2 signals. The table below shows the behavior for different range of CC1 or CC2: range | power supply | red led | console message (Volts) | (Amps) | blinks | --------------|--------------|---------|----------------------------------- [2.10 - 1.23[ | 3 | NO | NO [1.23 - 0.66[ | 1.5 | 3 times | WARNING 1.5A power supply detected [0.66 - 0] | 0.5 | 2 times | WARNING 500mA power supply detected If detected current is < 3A, red led is kept ON after blinking. Signed-off-by:
Patrice Chotard <patrice.chotard@st.com>
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Patrice Chotard authored
Update README with DK1 and DK2 boards related informations Signed-off-by:
Patrice Chotard <patrice.chotard@st.com>
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Patrice Chotard authored
This patch synchronizes U-boot DT with kernel one This is based on https://patchwork.kernel.org/cover/10797115/ This patch adds initial support of STM32MP157 discovery boards: - Add support of stm32mp157a discovery1 board (part number: STM32MP157A-DK1). This board embeds a STM32MP157a SOC with AC package (TFBGA361, 148 ios) and 512MB of DDR3. Several connections are available on this boards: 4*USB2.0, 1*USB2.0 typeC, SDcard, RJ45, HDMI, Arduino connector, ... - Add support of stm32mp157c discovery2 board (part number: STM32MP157C-DK2). This board is a "super-set" of stm32mp157a-dk1. A display panel (otm8009a) and Murata wifi/BT combo is added. Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by:
Patrice Chotard <patrice.chotard@st.com>
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Patrick Delaunay authored
Add functions to read/update the non volatile memory of STPMIC1 (8 bytes-register at 0xF8 address) and allow access with fuse command (bank=1, word > 0xF8). For example: STM32MP> fuse read 1 0xf8 8 Reading bank 1: Word 0x000000f8: 000000ee 00000092 000000c0 00000002 Word 0x000000fc: 000000f2 00000080 00000002 00000033 Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Updates the stm32mp157c devicetree to bind the U-Boot PSCI driver need for power off command; TF-A for stm32mp15x supports PSCI 1.0. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Activate the command poweroff by default for STM32MP1: - with PCSI from TF-A for trusted boot - with PMIC sysreset request for basic boot (SYSRESET_POWER) Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Add sysreset support, and support power switch off request, needed by poweroff command. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Alignment with STPMIC1 datasheet s/MAIN_CONTROL_REG/MAIN_CR/g s/MASK_RESET_BUCK/BUCKS_MRST_CR/g s/MASK_RESET_LDOS/LDOS_MRST_CR/g s/BUCKX_CTRL_REG/BUCKX_MAIN_CR/g s/VREF_CTRL_REG/REFDDR_MAIN_CR/g s/LDOX_CTRL_REG/LDOX_MAIN_CR/g s/USB_CTRL_REG/BST_SW_CR/g s/STPMIC1_NVM_USER_STATUS_REG/STPMIC1_NVM_SR/g s/STPMIC1_NVM_USER_CONTROL_REG/STPMIC1_NVM_CR/g and update all the associated defines. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Alignment with kernel driver name & binding introduced by https://patchwork.kernel.org/cover/10761943/ to use the final marketing name = STPMIC1. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by:
Lukasz Majewski <lukma@denx.de>
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Patrick Delaunay authored
Prepare file modification for kernel alignment and rename driver to stpmic1. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by:
Lukasz Majewski <lukma@denx.de>
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Patrick Delaunay authored
SW impact for Rev 1.2 of STPMIC1 in U-Boot: Buck converters output voltage change for Buck1 => Vdd min 0,725 to max 1,5V instead of 0.6V to 1.35V (see STPMIC1 datasheet / chapter 5.3 Buck converters) Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Replace STM32_BSEC_OTP() by STM32_BSEC_SHADOW() to increase read performance. Signed-off-by:
Patrice Chotard <patrice.chotard@st.com> Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Update bsec driver to use the device tree provided by Kernel. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
SPL need to set GPIOZ_SECCFGR = 0 to enable access to GPIOZ bank (open security). Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Always use upper case for serial number. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Initialize the system configuration for basic boot - update interconnect setting - disable pull-down for boot pin - enable High Speed Low Voltage Pad mode for SPI, SDMMC, ETH, QSPI - activate I/O compensation Done by SSBL = TF-A for trusted boot Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Add SYSCON driver for syscfg and etpzc and reorder in alphabetics order Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Add configuration useful for test - FIT support - MEMTEST - DFU - CACHE - TIME - TIMER Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Update the memory layout to be aligned with other platform and avoid overlap with 32MB Linux kernel (multiv7 image). + Kernel => 32MiB offset = 0xC2000000 and increase the bootm size to 32MiB + FDT => 64MiB offset = 0xc4000000 + SCRIPT => 65Mib offset = 0xc4100000 + PXESCRIPT => 66Mib offset = 0xc4200000 + SPLASHIMAGE => 67Mib offset = 0xc4300000 + RAMDISK => 68Mib offset = 0xc4400000 (not limited size) In sources/boot/u-boot/doc/README.distro + kernel_addr_r: A size of 16MB for the kernel is likely adequate. + pxefile_addr_r: A size of 1MB for extlinux.conf is more than adequate. + fdt_addr_r: A size of 1MB for the FDT/DTB seems reasonable. + ramdisk_addr_r: It is recommended that this location be highest in RAM out of fdt_addr_, kernel_addr_r, and ramdisk_addr_r, so that the RAM disk can vary in size and use any available RAM. + pxefile_addr_r: A size of 1MB for extlinux.conf is more than adequate. + scriptaddr: A size of 1MB for extlinux.conf is more than adequate. For suggestions on memory locations for ARM systems, you must follow the guidelines specified in Documentation/arm/Booting in the Linux kernel tree. And in sources/linux-stm32mp/Documentation/arm/Booting The zImage may also be placed in system RAM and called there. The kernel should be placed in the first 128MiB of RAM. It is recommended that it is loaded above 32MiB in order to avoid the need to relocate prior to decompression, which will make the boot process slightly faster. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
The boot mode can be forced by key press or by TAMP register, requested in kernel by syscon-reboot-mode tamp: tamp@5c00a000 { compatible = "simple-bus", "syscon", "simple-mfd"; reg = <0x5c00a000 0x400>; reboot-mode { compatible = "syscon-reboot-mode"; offset = <0x150>; /* reg20 */ mask = <0xff>; mode-normal = <0>; mode-fastboot = <0x1>; mode-recovery = <0x2>; mode-stm32cubeprogrammer = <0x3>; mode-ums_mmc0 = <0x10>; mode-ums_mmc1 = <0x11>; mode-ums_mmc2 = <0x12>; }; }; Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
activate Fastboot for eMMC on EV1 board (mmc1) $> sudo apt-get install android-tools-adb android-tools-fastboot $> fastboot -i 0x0483 getvar bootloader-version Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Clearly separate bootcmd for stm32mp1 board (bootcmd_stm32mp) and preboot management. That solve issue for fastboot continue command. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
When DDR initialization failed, print error message and stop the SPL execution. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Add explaination for the return value of psci_migrate_info_type: 2 = Trusted OS. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Cosmetic cleanup in mach-stm32mp Kconfig - remove duplicated SPL_DRIVERS_MISC_SUPPORT - update help for TARGET_STM32MP1 - set value for NR_DRAM_BANKS - remove one comment as DEBUG_UART is deactivated by default - include board Kconfig at the end of the file Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
SPL displays the board model from device tree. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Display CPU part number and package information. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
- export the function get_bootmode() and reused it in spl code - manage uart instance by alias (prepare v4.19 binding) - solve issue on nand instance - restore console for uart boot Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Set board name with the first dts compatible found in DT code under CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG The result with DEVICE_TREE=stm32mp157c-ev1 is: STM32MP> env print board=stm32mp1 board_name=stm32mp157c-ev1 Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Implement checkboard() function to display - the boot chain used: basic or trusted - the board compatible in device tree - the board identifier and revision, saved in OTP59 for ST boards Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
As BSEC is secure aware, all register access need to be done by TF-A for TRUSTED boot chain, when U-Boot is executed in normal world. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay authored
Add support of trusted boot, using TF-A as first stage bootloader, The boot sequence is BootRom >=> TF-A.stm32 (clock & DDR) >=> U-Boot.stm32 The TF-A monitor provides secure monitor with support of SMC - proprietary to manage secure devices (BSEC for example) - PSCI for power The same device tree is used for STMicroelectronics boards with basic boot and with trusted boot. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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