1. 10 Dec, 2019 16 commits
  2. 09 Dec, 2019 4 commits
    • Heinrich Schuchardt's avatar
      arm: -march=armv5t for ARM11 · 0c5c3f29
      Heinrich Schuchardt authored
      In GCC 9 support for the Armv5 and Armv5E architectures (which have no
      known implementations) has been removed, cf.
      Commit 16540d07 ("arm: fix -march for ARM11") changed the value of the
      compiler flag from -march=armv5 and -march=armv5t into -march=armv6 for
      The values prior to this patch were:
          arch-$(CONFIG_CPU_ARM1136)     =-march=armv5
          arch-$(CONFIG_CPU_ARM1176)     =-march=armv5t
      The change lead to a regression with the Raspberry Pi Zero W not booting
      Use -march=armv5t both for ARM1136 and ARM1176.
      Fixes: 16540d07
       ("arm: fix -march for ARM11")
      Signed-off-by: default avatarHeinrich Schuchardt <xypron.glpk@gmx.de>
      Tested-by: default avatarJoris Offouga <offougajoris@gmail.com>
    • Heinrich Schuchardt's avatar
      linux/types.h: fix typo unchar · 37db55b7
      Heinrich Schuchardt authored
      unsigned char should be called uchar and not unchar.
      This fixes a build error in lib/crypto/x509_cert_parser.c.
      Signed-off-by: default avatarHeinrich Schuchardt <xypron.glpk@gmx.de>
    • Tom Rini's avatar
      Merge tag 'u-boot-imx-20191209' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx · 2f028458
      Tom Rini authored
      Fixes for 2020.01
      - imx8qxp_mek: increase buffer sizes and args number
      - Fixes for imx7ulp
      - imx8mm: Fix the first root clock in imx8mm_ahb_sels[]
      - colibri_imx7: reserve DDR memory for Cortex-M4
      - vining2000: fixes and convert to ethernet DM
      - imx8m: fix rom version check to unbreak some B0 chips
      - tbs2910: Disable VxWorks image booting support
    • Patrick Wildt's avatar
      imx8m: fix rom version check to unbreak some B0 chips · 6a4b07e0
      Patrick Wildt authored
      Recently the version check was improved to be able to determine that
      we're running on SoC revision 2.1.  A check for B0 was tightened so
      that it now must equal 0x20 instead of being bigger than 0x20.  On
      some B0 chips the value returned is 0x1020 instead of 0x20.  This
      means even though it's B0, the check will fail and code relying on
      the correct chip revision will make wrong decisions.  There is no
      documentation of those bits, but it seems that NXP always uses a
      byte to encode the revision.  Thus remove the upper bits to fix the
      Signed-off-by: default avatarPatrick Wildt <patrick@blueri.se>
  3. 08 Dec, 2019 3 commits
  4. 06 Dec, 2019 17 commits