Commit 46a1e1aa authored by Caveh Jalali's avatar Caveh Jalali Committed by chrome-bot
Browse files

anx3429: add skeleton for FW update driver.



this adds a skeletal "nop" firmware update driver for the anx3429
TCPC.  the reef board file instantiates the driver, so it's actually
invoked at boot time.  it just tells vboot that the anx3429 firmware
is up-to-date and no further interaction takes place.

BRANCH=none
BUG=b:35586895
TEST=built & booted new firmware on reef.  no ill effects.

Change-Id: Ia134255ec4998d08322e16d786da3e050e8279c2
Signed-off-by: default avatarCaveh Jalali <caveh@google.com>
Reviewed-on: https://chromium-review.googlesource.com/592640

Reviewed-by: default avatarShawn N <shawnn@chromium.org>
parent df92a81c
......@@ -26,6 +26,7 @@ CONFIG_DRIVER_BUS_I2C_DESIGNWARE=y
CONFIG_DRIVER_BUS_I2C_DESIGNWARE_PCI=y
CONFIG_DRIVER_EC_CROS=y
CONFIG_DRIVER_EC_CROS_LPC=y
CONFIG_DRIVER_EC_ANX3429=y
CONFIG_DRIVER_EC_PS8751=y
CONFIG_DRIVER_FLASH_MEMMAPPED=y
CONFIG_DRIVER_INPUT_PS2=y
......
......@@ -26,6 +26,7 @@ CONFIG_DRIVER_BUS_I2C_DESIGNWARE=y
CONFIG_DRIVER_BUS_I2C_DESIGNWARE_PCI=y
CONFIG_DRIVER_EC_CROS=y
CONFIG_DRIVER_EC_CROS_LPC=y
CONFIG_DRIVER_EC_ANX3429=y
CONFIG_DRIVER_EC_PS8751=y
CONFIG_DRIVER_FLASH_MEMMAPPED=y
CONFIG_DRIVER_INPUT_PS2=y
......
......@@ -26,6 +26,7 @@ CONFIG_DRIVER_BUS_I2C_DESIGNWARE=y
CONFIG_DRIVER_BUS_I2C_DESIGNWARE_PCI=y
CONFIG_DRIVER_EC_CROS=y
CONFIG_DRIVER_EC_CROS_LPC=y
CONFIG_DRIVER_EC_ANX3429=y
CONFIG_DRIVER_EC_PS8751=y
CONFIG_DRIVER_FLASH_MEMMAPPED=y
CONFIG_DRIVER_INPUT_PS2=y
......
......@@ -25,6 +25,7 @@ CONFIG_DRIVER_BUS_I2C_DESIGNWARE=y
CONFIG_DRIVER_BUS_I2C_DESIGNWARE_PCI=y
CONFIG_DRIVER_EC_CROS=y
CONFIG_DRIVER_EC_CROS_LPC=y
CONFIG_DRIVER_EC_ANX3429=y
CONFIG_DRIVER_EC_PS8751=y
CONFIG_DRIVER_FLASH_MEMMAPPED=y
CONFIG_DRIVER_INPUT_PS2=y
......
......@@ -26,6 +26,7 @@ CONFIG_DRIVER_BUS_I2C_DESIGNWARE=y
CONFIG_DRIVER_BUS_I2C_DESIGNWARE_PCI=y
CONFIG_DRIVER_EC_CROS=y
CONFIG_DRIVER_EC_CROS_LPC=y
CONFIG_DRIVER_EC_ANX3429=y
CONFIG_DRIVER_EC_PS8751=y
CONFIG_DRIVER_FLASH_MEMMAPPED=y
CONFIG_DRIVER_INPUT_PS2=y
......
......@@ -26,6 +26,7 @@ CONFIG_DRIVER_BUS_I2C_DESIGNWARE=y
CONFIG_DRIVER_BUS_I2C_DESIGNWARE_PCI=y
CONFIG_DRIVER_EC_CROS=y
CONFIG_DRIVER_EC_CROS_LPC=y
CONFIG_DRIVER_EC_ANX3429=y
CONFIG_DRIVER_EC_PS8751=y
CONFIG_DRIVER_FLASH_MEMMAPPED=y
CONFIG_DRIVER_INPUT_PS2=y
......
......@@ -27,6 +27,7 @@
#include "drivers/bus/i2c/designware.h"
#include "drivers/bus/i2c/i2c.h"
#include "drivers/ec/cros/lpc.h"
#include "drivers/ec/anx3429/anx3429.h"
#include "drivers/ec/ps8751/ps8751.h"
#include "drivers/flash/memmapped.h"
#include "drivers/gpio/sysinfo.h"
......@@ -96,6 +97,8 @@ static int cr50_irq_status(void)
static int board_setup(void)
{
CrosECTunnelI2c *cros_ec_i2c_tunnel;
sysinfo_install_flags(NULL);
/* EC */
......@@ -105,9 +108,12 @@ static int board_setup(void)
register_vboot_ec(&cros_ec->vboot, 0);
/* programmables downstream from the EC */
CrosECTunnelI2c *cros_ec_i2c_tunnel_ps =
new_cros_ec_tunnel_i2c(cros_ec, /* i2c bus */ 1);
Ps8751 *ps8751 = new_ps8751(cros_ec_i2c_tunnel_ps, /* ec pd# */ 1);
cros_ec_i2c_tunnel = new_cros_ec_tunnel_i2c(cros_ec, /* i2c bus */ 0);
Anx3429 *anx3429 = new_anx3429(cros_ec_i2c_tunnel, /* ec pd# */ 0);
register_vboot_aux_fw(&anx3429->fw_ops);
cros_ec_i2c_tunnel = new_cros_ec_tunnel_i2c(cros_ec, /* i2c bus */ 1);
Ps8751 *ps8751 = new_ps8751(cros_ec_i2c_tunnel, /* ec pd# */ 1);
register_vboot_aux_fw(&ps8751->fw_ops);
board_flash_init();
......
......@@ -12,6 +12,7 @@
source src/drivers/bus/Kconfig
source src/drivers/dma/Kconfig
source src/drivers/ec/anx3429/Kconfig
source src/drivers/ec/anx7688/Kconfig
source src/drivers/ec/ps8751/Kconfig
source src/drivers/ec/cros/Kconfig
......
......@@ -12,6 +12,7 @@
##
subdirs-$(CONFIG_DRIVER_EC_CROS) += cros
subdirs-$(CONFIG_DRIVER_EC_ANX3429) += anx3429
subdirs-$(CONFIG_DRIVER_EC_ANX7688) += anx7688
subdirs-$(CONFIG_DRIVER_EC_PS8751) += ps8751
......
##
## Copyright 2017 Google Inc. All rights reserved.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
config DRIVER_EC_ANX3429
bool "ANX3429 TCPC"
default n
help
Add support for ANX3429 TCPC
##
## Copyright 2017 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
depthcharge-y += anx3429.c
/*
* Copyright 2017 The Chromium OS Authors. All rights reserved.
*
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/*
* MCU - microcontroller
* OCM - on chip microcontroller
* OTP - one time programmable (ROM)
* 16K words of 64 bit data + 8 bit ECC
*
* fun fact - it's an 18MHz 8051
*/
#include <endian.h>
#include <libpayload.h>
#include "base/container_of.h"
#include "drivers/ec/anx3429/anx3429.h"
/*
* enable debug code.
* level 1 adds some logging
* level 2 forces FW update, even more logging.
*/
#define ANX3429_DEBUG 0
#if (ANX3429_DEBUG > 0)
#define debug(msg, args...) printf("%s: " msg, __func__, ##args)
#else
#define debug(msg, args...)
#endif
static VbError_t anx3429_check_hash(const VbootAuxFwOps *vbaux,
const uint8_t *hash, size_t hash_size,
VbAuxFwUpdateSeverity_t *severity)
{
Anx3429 *me = container_of(vbaux, Anx3429, fw_ops);
debug("call...\n");
if (hash_size != sizeof(me->chip.fw_rev))
return VBERROR_INVALID_PARAMETER;
*severity = VB_AUX_FW_NO_UPDATE;
return VBERROR_SUCCESS;
}
static VbError_t anx3429_update_image(const VbootAuxFwOps *vbaux,
const uint8_t *image,
const size_t image_size)
{
VbError_t status = VBERROR_UNKNOWN;
debug("call...\n");
return status;
}
static VbError_t anx3429_protect(const VbootAuxFwOps *vbaux)
{
Anx3429 *me = container_of(vbaux, Anx3429, fw_ops);
debug("call...\n");
if (cros_ec_tunnel_i2c_protect(me->bus) != 0) {
printf("anx3429.%d: could not protect EC I2C tunnel\n",
me->ec_pd_id);
return VBERROR_UNKNOWN;
}
return VBERROR_SUCCESS;
}
static const VbootAuxFwOps anx3429_fw_ops = {
.fw_image_name = "anx3429_ocm.bin",
.fw_hash_name = "anx3429_ocm.hash",
.check_hash = anx3429_check_hash,
.update_image = anx3429_update_image,
.protect = anx3429_protect,
};
Anx3429 *new_anx3429(CrosECTunnelI2c *bus, int ec_pd_id)
{
Anx3429 *me = xzalloc(sizeof(*me));
me->bus = bus;
me->ec_pd_id = ec_pd_id;
me->fw_ops = anx3429_fw_ops;
return me;
}
/*
* Copyright 2017 The Chromium OS Authors. All rights reserved.
*
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#ifndef __DRIVERS_EC_ANX3429_H__
#define __DRIVERS_EC_ANX3429_H__
#include "drivers/bus/i2c/cros_ec_tunnel.h"
#include "drivers/ec/cros/ec.h"
#include "drivers/ec/vboot_aux_fw.h"
typedef struct Anx3429
{
VbootAuxFwOps fw_ops;
CrosECTunnelI2c *bus;
int ec_pd_id;
int debug_updated;
/* these are cached from chip regs */
struct {
uint16_t vendor;
uint16_t product;
uint16_t device;
uint8_t fw_rev;
} chip;
} Anx3429;
Anx3429 *new_anx3429(CrosECTunnelI2c *bus, int ec_pd_id);
#endif /* __DRIVERS_EC_ANX3429_H__ */
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment