Commit 00b52f8e authored by Andres Gomez's avatar Andres Gomez
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docs: add release notes for 17.2.6

Signed-off-by: default avatarAndres Gomez <>
parent 6f34ba40
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<title>Mesa Release Notes</title>
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<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 17.2.6 Release Notes / November 25, 2017</h1>
Mesa 17.2.6 is a bug fix release which fixes bugs found since the 17.2.5 release.
Mesa 17.2.6 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
<h2>SHA256 checksums</h2>
<h2>New features</h2>
<h2>Bug fixes</h2>
<li><a href="">Bug 100438</a> - glsl/ir.cpp:1376: ir_dereference_variable::ir_dereference_variable(ir_variable*): Assertion `var != NULL' failed.</li>
<li><a href="">Bug 102177</a> - [SKL] ES31-CTS.core.sepshaderobjs.StateInteraction fails sporadically</li>
<li><a href="">Bug 103115</a> - [BSW BXT GLK] dEQP-VK.spirv_assembly.instruction.compute.sconvert.int32_to_int64</li>
<li><a href="">Bug 103519</a> - wayland egl apps crash on start with mesa 17.2</li>
<li><a href="">Bug 103529</a> - [GM45] GPU hang with mpv fullscreen (bisected)</li>
<li><a href="">Bug 103626</a> - [SNB] ES3-CTS.functional.shaders.precision</li>
<li><a href="">Bug 103628</a> - [BXT, GLK, BSW] KHR-GL46.shader_ballot_tests.ShaderBallotBitmasks</li>
<li><a href="">Bug 103787</a> - [BDW,BSW] gpu hang on spec.arb_pipeline_statistics_query.arb_pipeline_statistics_query-comp</li>
<p>Adam Jackson (2):</p>
<li>glx/drisw: Fix glXMakeCurrent(dpy, None, ctx)</li>
<li>glx/dri3: Fix passing renderType into glXCreateContext</li>
<p>Alex Smith (2):</p>
<li>spirv: Use correct type for sampled images</li>
<li>nir/spirv: tg4 requires a sampler</li>
<p>Andres Gomez (14):</p>
<li>docs: add sha256 checksums for 17.2.5</li>
<li>cherry-ignore: intel/fs: Use a pure vertical stride for large register strides</li>
<li>cherry-ignore: intel/nir: Use the correct indirect lowering masks in link_shaders</li>
<li>cherry-ignore: intel/fs: Use the original destination region for int MUL lowering</li>
<li>cherry-ignore: intel/fs: refactors</li>
<li>cherry-ignore: r600/shader: reserve first register of vertex shader.</li>
<li>cherry-ignore: anv/cmd_buffer: Advance the address when initializing clear colors</li>
<li>cherry-ignore: anv/cmd_buffer: Take bo_offset into account in fast clear state addresses</li>
<li>cherry-ignore: i965: Mark BOs as external when we export their handle</li>
<li>cherry-ignore: added 17.3 nominations.</li>
<li>cherry-ignore: glsl: Fix typo fragement -&gt; fragment</li>
<li>cherry-ignore: egl: pass the dri2_dpy to the $plat_teardown functions</li>
<li>cherry-ignore: Revert "intel/fs: Use a pure vertical stride for large register strides"</li>
<li>Update version to 17.2.6</li>
<p>Anuj Phogat (2):</p>
<li>i965: Program DWord Length in MI_FLUSH_DW</li>
<li>i965/gen8+: Fix the number of dwords programmed in MI_FLUSH_DW</li>
<p>Bas Nieuwenhuizen (2):</p>
<li>radv: Free syncobj with multiple imports.</li>
<li>radv: Free temporary syncobj after waiting on it.</li>
<p>Dave Airlie (1):</p>
<li>r600: fix isoline tess factor component swapping.</li>
<p>Derek Foreman (1):</p>
<li>egl/wayland: Add a fallback when fourcc query isn't supported</li>
<p>Dylan Baker (1):</p>
<li>autotools: Set C++ visibility flags on Intel</li>
<p>Emil Velikov (3):</p>
<li>targets/opencl: don't hardcode the icd file install to /etc/...</li>
<li> loosen --enable-glvnd check to honour egl</li>
<li> require xcb* for the omx/va/... when using x11 platform</li>
<p>George Barrett (1):</p>
<li>glsl: Catch subscripted calls to undeclared subroutines</li>
<p>Jason Ekstrand (9):</p>
<li>intel/fs: Use ANY/ALL32 predicates in SIMD32</li>
<li>intel/fs: Use an explicit D type for vote any/all/eq intrinsics</li>
<li>intel/fs: Use a pair of 1-wide MOVs instead of SEL for any/all</li>
<li>intel/eu/reg: Add a subscript() helper</li>
<li>intel/fs: Fix MOV_INDIRECT for 64-bit values on little-core</li>
<li>intel/fs: Fix integer multiplication lowering for src/dst hazards</li>
<li>intel/fs: Mark 64-bit values as being contiguous</li>
<li>intel/fs: Rework zero-length URB write handling</li>
<li>i965: Add stencil buffers to cache set regardless of stencil texturing</li>
<p>Kenneth Graunke (5):</p>
<li>i965: properly initialize brw-&gt;cs.base.stage to MESA_SHADER_COMPUTE</li>
<li>i965: Make L3 configuration atom listen for TCS/TES program updates.</li>
<li>intel/tools: Fix detection of enabled shader stages.</li>
<li>i965: Implement another VF cache invalidate workaround on Gen8+.</li>
<li>i965: Upload invariant state once at the start of the batch on Gen4-5.</li>
<p>Matt Turner (2):</p>
<li>i965/fs: Fix extract_i8/u8 to a 64-bit destination</li>
<li>i965/fs: Split all 32-&gt;64-bit MOVs on CHV, BXT, GLK</li>
<p>Neil Roberts (1):</p>
<li>glsl: Transform fb buffers are only active if a variable uses them</li>
<p>Nicolai Hähnle (1):</p>
<li>ddebug: fix use-after-free of streamout targets</li>
<p>Tim Rowley (2):</p>
<li>swr/rast: Use gather instruction for i32gather_ps on simd16/avx512</li>
<li>swr/rast: Faster emulated simd16 permute</li>
<p>Timothy Arceri (3):</p>
<li>glsl: drop cache_fallback</li>
<li>glsl: use the correct parent when allocating program data members</li>
<li>mesa: rework how we free gl_shader_program_data</li>
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