microblaze: avoid interrupt race conditions

The interrupt acknowledge action have to run after the
registered interrupt handler. So we have a chance to
bear out the corresponding interrupt request in the
corresponding controller hardware.

With this reordering, we optain a proper interrupt
handling for level triggered interrupt sources -- for
example the new axi_timer v1.02.a introduced in ISE 13.2.

Signed-off-by: Stephan Linz <linz@li-pro.net>
Acked-by: Michal Simek <monstr@monstr.eu>

arch/microblaze/cpu/interrupts.c

@@ -155,8 +155,6 @@ void interrupt_handler (void)
 #endif
 	struct irq_action *act = vecs + irqs;
 
-	intc->iar = mask << irqs;
-
 #ifdef DEBUG_INT
 	printf
 	    ("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n",
@@ -165,6 +163,8 @@ void interrupt_handler (void)
 	act->handler (act->arg);
 	act->count++;
 
+	intc->iar = mask << irqs;
+
 #ifdef DEBUG_INT
 	printf ("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr,
 		intc->ier, intc->iar, intc->mer);