From b8fea2b27d7aeabd2e0bc4242277ff2787c7c622 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?=
<benoit.thebaudeau@advansee.com>
Date: Mon, 13 Aug 2012 22:49:53 +0200
Subject: [PATCH] spl mxc nand: Fix broken boot for correctable ECC errors
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Do not stop boot as soon as an ECC error is detected. Only stop boot for
uncorrectable ECC errors.
This fixes boards no longer booting after some time because a NAND Flash bit has
flipped.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
nand_spl/nand_boot_fsl_nfc.c | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/nand_spl/nand_boot_fsl_nfc.c b/nand_spl/nand_boot_fsl_nfc.c
index 4c5a7feec16..ea05952eb5e 100644
--- a/nand_spl/nand_boot_fsl_nfc.c
+++ b/nand_spl/nand_boot_fsl_nfc.c
@@ -140,9 +140,21 @@ static void nfc_nand_data_output(void)
static int nfc_nand_check_ecc(void)
{
#if defined(MXC_NFC_V1)
- return readw(&nfc->ecc_status_result);
+ u16 ecc_status = readw(&nfc->ecc_status_result);
+ return (ecc_status & 0x3) == 2 || (ecc_status >> 2) == 2;
#elif defined(MXC_NFC_V1_1)
- return readl(&nfc->ecc_status_result);
+ u32 ecc_status = readl(&nfc->ecc_status_result);
+ int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
+ int err_limit = CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16 ? 8 : 4;
+ int subpages = CONFIG_SYS_NAND_PAGE_SIZE / 512;
+
+ do {
+ if ((ecc_status & 0xf) > err_limit)
+ return 1;
+ ecc_status >>= 4;
+ } while (--subpages);
+
+ return 0;
#endif
}
--
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