When adding hashes or signatures, the target FDT may be full. Detect this
and automatically try again after making 1KB of space.

Signed-off-by: Simon Glass <sjg@chromium.org>

Make the error handling common, and make sure the file is always closed
on error. Rename the parameter to be more description and add comments.

Signed-off-by: Simon Glass <sjg@chromium.org>

When writing values into an FDT it is possible that there will be
insufficient space. If the caller gets a useful error then it can
potentially deal with the situation.

Adjust these functions to return -ENOSPC when the FDT is full.

Signed-off-by: Simon Glass <sjg@chromium.org>

In some cases, an externally-built device tree binary is required to be
attached to U-Boot. An example is when using image signing, since in that
case the .dtb file must include the public keys.

Add a DEV_TREE_BIN option to the Makefile, and update the documentation.

Usage is something like:

	make DEV_TREE_BIN=boot/am335x-boneblack-pubkey.dtb

Signed-off-by: Simon Glass <sjg@chromium.org>

This function is useful for displaying a hash value, so export it.

Signed-off-by: Simon Glass <sjg@chromium.org>

Enable the cache for all devices, unless CONFIG_SYS_DCACHE_OFF is defined.
This speeds up the Beaglebone Black boot considerable.

(Tested only on Beaglebone Black with SD card boot)

Signed-off-by: Simon Glass <sjg@chromium.org>

Check that the image size matches the size we get from u-boot.bin. If it
doesn't, that generally means that some extra sections are being added to
u-boot.bin, meaning that it is not possible to access data appended to
the U-Boot binary. This is used for device tree, so needs to work.

This problem was introduced by commit b02bfc4d. By adding a test we can
prevent a reccurence.

Signed-off-by: Simon Glass <sjg@chromium.org>

Correct the binary output so that image_binary_size is really at the
end of the image.

Signed-off-by: Simon Glass <sjg@chromium.org>

Correct the binary output so that image_binary_size is really at the
end of the image.

Signed-off-by: Simon Glass <sjg@chromium.org>

This should include the hash so that image_binary_size is really at the
end of the image, and not some 300 bytes earlier.

Signed-off-by: Simon Glass <sjg@chromium.org>

When building tools the u-boot specific sha256.h is required, but the
host version of sha256.h is used when present. This leads to build errors
on FreeBSD which does have a system sha256.h include. Like libfdt_env.h
explicitly include u-boot's sha256.h.

cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Acked-by: Simon Glass <sjg@chromium.org>

Building u-boot tools with clang as a host compiler e.g. on
FreeBSD with `gmake HOSTCC=clang CONFIG_USE_PRIVATE_LIBGCC=y tools`
leads to many warnings [1] for every compiler invocation since
commit 598e2d33. Part of mentioned commit imports linux patches:

 - kbuild: LLVMLinux: Adapt warnings for compilation with clang
 - kbuild: LLVMLinux: Add Kbuild support for building kernel with Clang

No version of clang supports the gcc fno-delete-null-pointer-checks
though, but it is only passed to clang. Gcc does not have the clang
specific Qunused-arguments for the target. Furthermore several
warnings are disabled which aren't encountered in u-boot. Since such
a build has worked for quite some time and works after removing these
changes, just remove the clang specific handling to restore normal
building with clang as hostcc.

[1] Actual warnings
-------------------
  GEN     include/autoconf.mk.dep
arm-freebsd-gcc: unrecognized option '-Qunused-arguments'

  HOSTCC  scripts/basic/fixdep
clang: warning: argument unused during compilation:
                '-fno-delete-null-pointer-checks'

cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>

Patch (SHA1: bd694244)
dfu: Introduction of the "dfu_hash_algo" env variable for checksum method
setting

already introduced more generic handling of the crc32 calculation.
Up till now the CRC32 of received data was calculated unconditionally.
This patch changes this and from now - by default the crc32 is NOT
calculated anymore.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>

Sometimes, a zero-length packet is required at the end of an IN
transaction so that the host knows the device is done sending data.
Enhance ci_udc to send a zlp when necessary. See the comments for
more details.

Signed-off-by: Stephen Warren <swarren@nvidia.com>

usb_gadget_unregister_driver() is called to tear down the USB device mode
stack. Fix the driver to stop the USB HW (which causes any attached host
to notice the disappearance of the device), and free all allocations
(which obviously prevents memory leaks).

Signed-off-by: Stephen Warren <swarren@nvidia.com>

If allocation of the ep0 req fails, clean up all the allocations that
were made in ci_udc_probe().

Signed-off-by: Stephen Warren <swarren@nvidia.com>

ci_ep_alloc_request() avoids allocating multiple request objects for ep0
by keeping a record of the first req allocated for ep0, and always
returning that instead of allocating a new req. However, if this req is
ever freed, the record of the previous allocation is not cleared, so
ci_ep_alloc_request() will keep returning this stale pointer. Fix
ci_ep_free_request() to clear the record of the previous allocation.

Signed-off-by: Stephen Warren <swarren@nvidia.com>

ci_pullup()'s !is_on path contains a cut/paste copy of udc_disconnect().
Remove the duplication by simply calling udc_disconnect() instead.

Signed-off-by: Stephen Warren <swarren@nvidia.com>

Signed-off-by: Tom Rini <trini@ti.com>

'r' of rESR_RTLF is a mistake of E.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

This fixes checkpatch's warning.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

The R7S72100 of ARM SoC that Renesas manufactured has one Ether port.
This has the same IP SH-Ether. This patch adds support of the R7S72100
in SH-Ether.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Currently, flash quad bit is set in "spi_flash_validate_params" and later
at the end in the same api, we write 0 to status register for few flashes,
thereby overriding the quad bit set. This fix moves the quad bit setting
outside this api in "spi_flash_probe_slave"

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>

This mirrors the conventions used in other SPI drivers (kirkwood,
davinci, atmel, et al) where the din/dout buffer can be NULL when the
received/transmitted data isn't important.  This reduces the need for
allocating additional buffers when write-only/read-only functionality is
needed.

In the din == NULL case, the received data is simply not stored.  In the
dout == NULL case, zeroes are transmitted.

Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>

Added support for Spansion chip "S25FL512S_512K".

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>

This family is supported by the TPS65218 PMIC.  Implement a scale_vcores
to set the MPU and CORE voltage correctly to the max frequency that is
supported (and what we will be scaling them to in setup_dplls()).

Signed-off-by: Tom Rini <trini@ti.com>

Add a driver for the TPS65218 PMIC which is used by TI AM43xx SoCs and
may be used by TI AM335x SoCs.

Signed-off-by: Tom Rini <trini@ti.com>

Similar to OMAP4/5 we need to scale the voltage up prior to changing the
clock frequencies up higher.  Add a similar hook to start with.

Signed-off-by: Tom Rini <trini@ti.com>

Signed-off-by: Tom Rini <trini@ti.com>

Cc: trini@ti.com
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>

in almost all cases we need the i2c commands within the u-boot shell.
So we enable them within the common section.

Cc: trini@ti.com
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>

if we have no NAND-Chip, we don't need the gpmc-controller and therefore
is no need to init it.

Cc: trini@ti.com
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>

Cc: trini@ti.com
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>

Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>

For usage of timer6 within B&R we need this defines to enable clock
modules and clk-source.

Also the 'Timer register bits' are expanded.

By the way we add defines for all timers within AM335x SoC.

Cc: trini@ti.com
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>

After enabling a module, SW has to wait on IDLEST bit
until it is Fully functional. This wait is missing for UART module
and there is a immediate access of UART registers after this. So there
is a chance of hang on this module( This can happen when we are running
from MPU SRAM). So waiting for IDLEST bit.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>