fault.c 32.4 KB
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/*
 *  Copyright (C) 1995  Linus Torvalds
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 *  Copyright (C) 2001, 2002 Andi Kleen, SuSE Labs.
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 *  Copyright (C) 2008-2009, Red Hat Inc., Ingo Molnar
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 */
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#include <linux/sched.h>		/* test_thread_flag(), ...	*/
#include <linux/kdebug.h>		/* oops_begin/end, ...		*/
#include <linux/module.h>		/* search_exception_table	*/
#include <linux/bootmem.h>		/* max_low_pfn			*/
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#include <linux/kprobes.h>		/* NOKPROBE_SYMBOL, ...		*/
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#include <linux/mmiotrace.h>		/* kmmio_handler, ...		*/
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#include <linux/perf_event.h>		/* perf_sw_event		*/
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#include <linux/hugetlb.h>		/* hstate_index_to_shift	*/
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#include <linux/prefetch.h>		/* prefetchw			*/
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#include <linux/context_tracking.h>	/* exception_enter(), ...	*/
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#include <linux/uaccess.h>		/* faulthandler_disabled()	*/
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#include <asm/traps.h>			/* dotraplinkage, ...		*/
#include <asm/pgalloc.h>		/* pgd_*(), ...			*/
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#include <asm/kmemcheck.h>		/* kmemcheck_*(), ...		*/
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#include <asm/fixmap.h>			/* VSYSCALL_ADDR		*/
#include <asm/vsyscall.h>		/* emulate_vsyscall		*/
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#define CREATE_TRACE_POINTS
#include <asm/trace/exceptions.h>

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/*
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 * Page fault error code bits:
 *
 *   bit 0 ==	 0: no page found	1: protection fault
 *   bit 1 ==	 0: read access		1: write access
 *   bit 2 ==	 0: kernel-mode access	1: user-mode access
 *   bit 3 ==				1: use of reserved bit detected
 *   bit 4 ==				1: fault was an instruction fetch
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 */
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enum x86_pf_error_code {

	PF_PROT		=		1 << 0,
	PF_WRITE	=		1 << 1,
	PF_USER		=		1 << 2,
	PF_RSVD		=		1 << 3,
	PF_INSTR	=		1 << 4,
};
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/*
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 * Returns 0 if mmiotrace is disabled, or if the fault is not
 * handled by mmiotrace:
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 */
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static nokprobe_inline int
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kmmio_fault(struct pt_regs *regs, unsigned long addr)
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{
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	if (unlikely(is_kmmio_active()))
		if (kmmio_handler(regs, addr) == 1)
			return -1;
	return 0;
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}

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static nokprobe_inline int kprobes_fault(struct pt_regs *regs)
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{
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	int ret = 0;

	/* kprobe_running() needs smp_processor_id() */
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	if (kprobes_built_in() && !user_mode(regs)) {
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		preempt_disable();
		if (kprobe_running() && kprobe_fault_handler(regs, 14))
			ret = 1;
		preempt_enable();
	}
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	return ret;
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}
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/*
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 * Prefetch quirks:
 *
 * 32-bit mode:
 *
 *   Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch.
 *   Check that here and ignore it.
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 *
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 * 64-bit mode:
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 *
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 *   Sometimes the CPU reports invalid exceptions on prefetch.
 *   Check that here and ignore it.
 *
 * Opcode checker based on code by Richard Brunner.
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 */
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static inline int
check_prefetch_opcode(struct pt_regs *regs, unsigned char *instr,
		      unsigned char opcode, int *prefetch)
{
	unsigned char instr_hi = opcode & 0xf0;
	unsigned char instr_lo = opcode & 0x0f;

	switch (instr_hi) {
	case 0x20:
	case 0x30:
		/*
		 * Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes.
		 * In X86_64 long mode, the CPU will signal invalid
		 * opcode if some of these prefixes are present so
		 * X86_64 will never get here anyway
		 */
		return ((instr_lo & 7) == 0x6);
#ifdef CONFIG_X86_64
	case 0x40:
		/*
		 * In AMD64 long mode 0x40..0x4F are valid REX prefixes
		 * Need to figure out under what instruction mode the
		 * instruction was issued. Could check the LDT for lm,
		 * but for now it's good enough to assume that long
		 * mode only uses well known segments or kernel.
		 */
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		return (!user_mode(regs) || user_64bit_mode(regs));
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#endif
	case 0x60:
		/* 0x64 thru 0x67 are valid prefixes in all modes. */
		return (instr_lo & 0xC) == 0x4;
	case 0xF0:
		/* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */
		return !instr_lo || (instr_lo>>1) == 1;
	case 0x00:
		/* Prefetch instruction is 0x0F0D or 0x0F18 */
		if (probe_kernel_address(instr, opcode))
			return 0;

		*prefetch = (instr_lo == 0xF) &&
			(opcode == 0x0D || opcode == 0x18);
		return 0;
	default:
		return 0;
	}
}

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static int
is_prefetch(struct pt_regs *regs, unsigned long error_code, unsigned long addr)
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{
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	unsigned char *max_instr;
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	unsigned char *instr;
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	int prefetch = 0;
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	/*
	 * If it was a exec (instruction fetch) fault on NX page, then
	 * do not ignore the fault:
	 */
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	if (error_code & PF_INSTR)
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		return 0;
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	instr = (void *)convert_ip_to_linear(current, regs);
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	max_instr = instr + 15;
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	if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE_MAX)
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		return 0;

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	while (instr < max_instr) {
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		unsigned char opcode;
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		if (probe_kernel_address(instr, opcode))
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			break;
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		instr++;

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		if (!check_prefetch_opcode(regs, instr, opcode, &prefetch))
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			break;
	}
	return prefetch;
}

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static void
force_sig_info_fault(int si_signo, int si_code, unsigned long address,
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		     struct task_struct *tsk, int fault)
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{
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	unsigned lsb = 0;
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	siginfo_t info;

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	info.si_signo	= si_signo;
	info.si_errno	= 0;
	info.si_code	= si_code;
	info.si_addr	= (void __user *)address;
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	if (fault & VM_FAULT_HWPOISON_LARGE)
		lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault)); 
	if (fault & VM_FAULT_HWPOISON)
		lsb = PAGE_SHIFT;
	info.si_addr_lsb = lsb;
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	force_sig_info(si_signo, &info, tsk);
}

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DEFINE_SPINLOCK(pgd_lock);
LIST_HEAD(pgd_list);

#ifdef CONFIG_X86_32
static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)
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{
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	unsigned index = pgd_index(address);
	pgd_t *pgd_k;
	pud_t *pud, *pud_k;
	pmd_t *pmd, *pmd_k;
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	pgd += index;
	pgd_k = init_mm.pgd + index;

	if (!pgd_present(*pgd_k))
		return NULL;

	/*
	 * set_pgd(pgd, *pgd_k); here would be useless on PAE
	 * and redundant with the set_pmd() on non-PAE. As would
	 * set_pud.
	 */
	pud = pud_offset(pgd, address);
	pud_k = pud_offset(pgd_k, address);
	if (!pud_present(*pud_k))
		return NULL;

	pmd = pmd_offset(pud, address);
	pmd_k = pmd_offset(pud_k, address);
	if (!pmd_present(*pmd_k))
		return NULL;

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	if (!pmd_present(*pmd))
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		set_pmd(pmd, *pmd_k);
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	else
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		BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k));

	return pmd_k;
}

void vmalloc_sync_all(void)
{
	unsigned long address;

	if (SHARED_KERNEL_PMD)
		return;

	for (address = VMALLOC_START & PMD_MASK;
	     address >= TASK_SIZE && address < FIXADDR_TOP;
	     address += PMD_SIZE) {
		struct page *page;

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		spin_lock(&pgd_lock);
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		list_for_each_entry(page, &pgd_list, lru) {
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			spinlock_t *pgt_lock;
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			pmd_t *ret;
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			/* the pgt_lock only for Xen */
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			pgt_lock = &pgd_page_get_mm(page)->page_table_lock;

			spin_lock(pgt_lock);
			ret = vmalloc_sync_one(page_address(page), address);
			spin_unlock(pgt_lock);

			if (!ret)
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				break;
		}
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		spin_unlock(&pgd_lock);
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	}
}

/*
 * 32-bit:
 *
 *   Handle a fault on the vmalloc or module mapping area
 */
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static noinline int vmalloc_fault(unsigned long address)
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{
	unsigned long pgd_paddr;
	pmd_t *pmd_k;
	pte_t *pte_k;

	/* Make sure we are in vmalloc area: */
	if (!(address >= VMALLOC_START && address < VMALLOC_END))
		return -1;

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	WARN_ON_ONCE(in_nmi());

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	/*
	 * Synchronize this task's top level page-table
	 * with the 'reference' page table.
	 *
	 * Do _not_ use "current" here. We might be inside
	 * an interrupt in the middle of a task switch..
	 */
	pgd_paddr = read_cr3();
	pmd_k = vmalloc_sync_one(__va(pgd_paddr), address);
	if (!pmd_k)
		return -1;

	pte_k = pte_offset_kernel(pmd_k, address);
	if (!pte_present(*pte_k))
		return -1;

	return 0;
}
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NOKPROBE_SYMBOL(vmalloc_fault);
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/*
 * Did it hit the DOS screen memory VA from vm86 mode?
 */
static inline void
check_v8086_mode(struct pt_regs *regs, unsigned long address,
		 struct task_struct *tsk)
{
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#ifdef CONFIG_VM86
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	unsigned long bit;

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	if (!v8086_mode(regs) || !tsk->thread.vm86)
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		return;

	bit = (address - 0xA0000) >> PAGE_SHIFT;
	if (bit < 32)
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		tsk->thread.vm86->screen_bitmap |= 1 << bit;
#endif
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}
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static bool low_pfn(unsigned long pfn)
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{
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	return pfn < max_low_pfn;
}
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static void dump_pagetable(unsigned long address)
{
	pgd_t *base = __va(read_cr3());
	pgd_t *pgd = &base[pgd_index(address)];
	pmd_t *pmd;
	pte_t *pte;
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#ifdef CONFIG_X86_PAE
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	printk("*pdpt = %016Lx ", pgd_val(*pgd));
	if (!low_pfn(pgd_val(*pgd) >> PAGE_SHIFT) || !pgd_present(*pgd))
		goto out;
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#endif
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	pmd = pmd_offset(pud_offset(pgd, address), address);
	printk(KERN_CONT "*pde = %0*Lx ", sizeof(*pmd) * 2, (u64)pmd_val(*pmd));
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	/*
	 * We must not directly access the pte in the highpte
	 * case if the page table is located in highmem.
	 * And let's rather not kmap-atomic the pte, just in case
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	 * it's allocated already:
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	 */
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	if (!low_pfn(pmd_pfn(*pmd)) || !pmd_present(*pmd) || pmd_large(*pmd))
		goto out;
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	pte = pte_offset_kernel(pmd, address);
	printk("*pte = %0*Lx ", sizeof(*pte) * 2, (u64)pte_val(*pte));
out:
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	printk("\n");
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}

#else /* CONFIG_X86_64: */

void vmalloc_sync_all(void)
{
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	sync_global_pgds(VMALLOC_START & PGDIR_MASK, VMALLOC_END, 0);
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}

/*
 * 64-bit:
 *
 *   Handle a fault on the vmalloc area
 *
 * This assumes no large pages in there.
 */
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static noinline int vmalloc_fault(unsigned long address)
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{
	pgd_t *pgd, *pgd_ref;
	pud_t *pud, *pud_ref;
	pmd_t *pmd, *pmd_ref;
	pte_t *pte, *pte_ref;

	/* Make sure we are in vmalloc area: */
	if (!(address >= VMALLOC_START && address < VMALLOC_END))
		return -1;

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	WARN_ON_ONCE(in_nmi());

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	/*
	 * Copy kernel mappings over when needed. This can also
	 * happen within a race in page table update. In the later
	 * case just flush:
	 */
	pgd = pgd_offset(current->active_mm, address);
	pgd_ref = pgd_offset_k(address);
	if (pgd_none(*pgd_ref))
		return -1;

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	if (pgd_none(*pgd)) {
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		set_pgd(pgd, *pgd_ref);
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		arch_flush_lazy_mmu_mode();
	} else {
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		BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
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	}
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	/*
	 * Below here mismatches are bugs because these lower tables
	 * are shared:
	 */

	pud = pud_offset(pgd, address);
	pud_ref = pud_offset(pgd_ref, address);
	if (pud_none(*pud_ref))
		return -1;

	if (pud_none(*pud) || pud_page_vaddr(*pud) != pud_page_vaddr(*pud_ref))
		BUG();

	pmd = pmd_offset(pud, address);
	pmd_ref = pmd_offset(pud_ref, address);
	if (pmd_none(*pmd_ref))
		return -1;

	if (pmd_none(*pmd) || pmd_page(*pmd) != pmd_page(*pmd_ref))
		BUG();

	pte_ref = pte_offset_kernel(pmd_ref, address);
	if (!pte_present(*pte_ref))
		return -1;

	pte = pte_offset_kernel(pmd, address);

	/*
	 * Don't use pte_page here, because the mappings can point
	 * outside mem_map, and the NUMA hash lookup cannot handle
	 * that:
	 */
	if (!pte_present(*pte) || pte_pfn(*pte) != pte_pfn(*pte_ref))
		BUG();

	return 0;
}
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NOKPROBE_SYMBOL(vmalloc_fault);
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#ifdef CONFIG_CPU_SUP_AMD
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static const char errata93_warning[] =
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KERN_ERR 
"******* Your BIOS seems to not contain a fix for K8 errata #93\n"
"******* Working around it, but it may cause SEGVs or burn power.\n"
"******* Please consider a BIOS update.\n"
"******* Disabling USB legacy in the BIOS may also help.\n";
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#endif
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/*
 * No vm86 mode in 64-bit mode:
 */
static inline void
check_v8086_mode(struct pt_regs *regs, unsigned long address,
		 struct task_struct *tsk)
{
}

static int bad_address(void *p)
{
	unsigned long dummy;

	return probe_kernel_address((unsigned long *)p, dummy);
}

static void dump_pagetable(unsigned long address)
{
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	pgd_t *base = __va(read_cr3() & PHYSICAL_PAGE_MASK);
	pgd_t *pgd = base + pgd_index(address);
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	pud_t *pud;
	pmd_t *pmd;
	pte_t *pte;

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	if (bad_address(pgd))
		goto bad;

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	printk("PGD %lx ", pgd_val(*pgd));
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	if (!pgd_present(*pgd))
		goto out;
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	pud = pud_offset(pgd, address);
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	if (bad_address(pud))
		goto bad;

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	printk("PUD %lx ", pud_val(*pud));
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	if (!pud_present(*pud) || pud_large(*pud))
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		goto out;
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	pmd = pmd_offset(pud, address);
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	if (bad_address(pmd))
		goto bad;

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	printk("PMD %lx ", pmd_val(*pmd));
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	if (!pmd_present(*pmd) || pmd_large(*pmd))
		goto out;
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	pte = pte_offset_kernel(pmd, address);
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	if (bad_address(pte))
		goto bad;

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	printk("PTE %lx", pte_val(*pte));
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out:
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	printk("\n");
	return;
bad:
	printk("BAD\n");
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}

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#endif /* CONFIG_X86_64 */
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/*
 * Workaround for K8 erratum #93 & buggy BIOS.
 *
 * BIOS SMM functions are required to use a specific workaround
 * to avoid corruption of the 64bit RIP register on C stepping K8.
 *
 * A lot of BIOS that didn't get tested properly miss this.
 *
 * The OS sees this as a page fault with the upper 32bits of RIP cleared.
 * Try to work around it here.
 *
 * Note we only handle faults in kernel here.
 * Does nothing on 32-bit.
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 */
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static int is_errata93(struct pt_regs *regs, unsigned long address)
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{
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#if defined(CONFIG_X86_64) && defined(CONFIG_CPU_SUP_AMD)
	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD
	    || boot_cpu_data.x86 != 0xf)
		return 0;

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	if (address != regs->ip)
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		return 0;
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	if ((address >> 32) != 0)
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		return 0;
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	address |= 0xffffffffUL << 32;
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	if ((address >= (u64)_stext && address <= (u64)_etext) ||
	    (address >= MODULES_VADDR && address <= MODULES_END)) {
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		printk_once(errata93_warning);
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		regs->ip = address;
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		return 1;
	}
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#endif
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	return 0;
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}
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/*
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 * Work around K8 erratum #100 K8 in compat mode occasionally jumps
 * to illegal addresses >4GB.
 *
 * We catch this in the page fault handler because these addresses
 * are not reachable. Just detect this case and return.  Any code
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 * segment in LDT is compatibility mode.
 */
static int is_errata100(struct pt_regs *regs, unsigned long address)
{
#ifdef CONFIG_X86_64
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	if ((regs->cs == __USER32_CS || (regs->cs & (1<<2))) && (address >> 32))
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		return 1;
#endif
	return 0;
}

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static int is_f00f_bug(struct pt_regs *regs, unsigned long address)
{
#ifdef CONFIG_X86_F00F_BUG
	unsigned long nr;
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	/*
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	 * Pentium F0 0F C7 C8 bug workaround:
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	 */
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	if (boot_cpu_has_bug(X86_BUG_F00F)) {
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		nr = (address - idt_descr.address) >> 3;

		if (nr == 6) {
			do_invalid_op(regs, 0);
			return 1;
		}
	}
#endif
	return 0;
}

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static const char nx_warning[] = KERN_CRIT
"kernel tried to execute NX-protected page - exploit attempt? (uid: %d)\n";
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static const char smep_warning[] = KERN_CRIT
"unable to execute userspace code (SMEP?) (uid: %d)\n";
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static void
show_fault_oops(struct pt_regs *regs, unsigned long error_code,
		unsigned long address)
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{
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	if (!oops_may_print())
		return;

	if (error_code & PF_INSTR) {
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		unsigned int level;
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		pgd_t *pgd;
		pte_t *pte;
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		pgd = __va(read_cr3() & PHYSICAL_PAGE_MASK);
		pgd += pgd_index(address);

		pte = lookup_address_in_pgd(pgd, address, &level);
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		if (pte && pte_present(*pte) && !pte_exec(*pte))
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			printk(nx_warning, from_kuid(&init_user_ns, current_uid()));
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		if (pte && pte_present(*pte) && pte_exec(*pte) &&
				(pgd_flags(*pgd) & _PAGE_USER) &&
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				(__read_cr4() & X86_CR4_SMEP))
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			printk(smep_warning, from_kuid(&init_user_ns, current_uid()));
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	}

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	printk(KERN_ALERT "BUG: unable to handle kernel ");
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	if (address < PAGE_SIZE)
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		printk(KERN_CONT "NULL pointer dereference");
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	else
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		printk(KERN_CONT "paging request");
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	printk(KERN_CONT " at %p\n", (void *) address);
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	printk(KERN_ALERT "IP:");
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	printk_address(regs->ip);
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	dump_pagetable(address);
}

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static noinline void
pgtable_bad(struct pt_regs *regs, unsigned long error_code,
	    unsigned long address)
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{
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	struct task_struct *tsk;
	unsigned long flags;
	int sig;

	flags = oops_begin();
	tsk = current;
	sig = SIGKILL;
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	printk(KERN_ALERT "%s: Corrupted page table at address %lx\n",
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	       tsk->comm, address);
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	dump_pagetable(address);
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	tsk->thread.cr2		= address;
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	tsk->thread.trap_nr	= X86_TRAP_PF;
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	tsk->thread.error_code	= error_code;

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	if (__die("Bad pagetable", regs, error_code))
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		sig = 0;
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	oops_end(flags, regs, sig);
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}

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static noinline void
no_context(struct pt_regs *regs, unsigned long error_code,
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	   unsigned long address, int signal, int si_code)
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{
	struct task_struct *tsk = current;
	unsigned long flags;
	int sig;

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	/* Are we prepared to handle this kernel fault? */
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	if (fixup_exception(regs)) {
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		/*
		 * Any interrupt that takes a fault gets the fixup. This makes
		 * the below recursive fault logic only apply to a faults from
		 * task context.
		 */
		if (in_interrupt())
			return;

		/*
		 * Per the above we're !in_interrupt(), aka. task context.
		 *
		 * In this case we need to make sure we're not recursively
		 * faulting through the emulate_vsyscall() logic.
		 */
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		if (current_thread_info()->sig_on_uaccess_error && signal) {
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			tsk->thread.trap_nr = X86_TRAP_PF;
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			tsk->thread.error_code = error_code | PF_USER;
			tsk->thread.cr2 = address;

			/* XXX: hwpoison faults will set the wrong code. */
			force_sig_info_fault(signal, si_code, address, tsk, 0);
		}
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		/*
		 * Barring that, we can do the fixup and be happy.
		 */
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		return;
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	}
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	/*
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	 * 32-bit:
	 *
	 *   Valid to do another page fault here, because if this fault
	 *   had been triggered by is_prefetch fixup_exception would have
	 *   handled it.
	 *
	 * 64-bit:
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	 *
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	 *   Hall of shame of CPU/BIOS bugs.
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	 */
	if (is_prefetch(regs, error_code, address))
		return;

	if (is_errata93(regs, address))
		return;

	/*
	 * Oops. The kernel tried to access some bad page. We'll have to
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	 * terminate things with extreme prejudice:
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	 */
	flags = oops_begin();

	show_fault_oops(regs, error_code, address);

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	if (task_stack_end_corrupted(tsk))
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		printk(KERN_EMERG "Thread overran stack, or stack corrupted\n");
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	tsk->thread.cr2		= address;
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	tsk->thread.trap_nr	= X86_TRAP_PF;
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	tsk->thread.error_code	= error_code;
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	sig = SIGKILL;
	if (__die("Oops", regs, error_code))
		sig = 0;
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	/* Executive summary in case the body of the oops scrolled away */
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	printk(KERN_DEFAULT "CR2: %016lx\n", address);
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	oops_end(flags, regs, sig);
}

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/*
 * Print out info about fatal segfaults, if the show_unhandled_signals
 * sysctl is set:
 */
static inline void
show_signal_msg(struct pt_regs *regs, unsigned long error_code,
		unsigned long address, struct task_struct *tsk)
{
	if (!unhandled_signal(tsk, SIGSEGV))
		return;

	if (!printk_ratelimit())
		return;

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	printk("%s%s[%d]: segfault at %lx ip %p sp %p error %lx",
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		task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG,
		tsk->comm, task_pid_nr(tsk), address,
		(void *)regs->ip, (void *)regs->sp, error_code);

	print_vma_addr(KERN_CONT " in ", regs->ip);

	printk(KERN_CONT "\n");
}

static void
__bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code,
		       unsigned long address, int si_code)
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{
	struct task_struct *tsk = current;

	/* User mode accesses just cause a SIGSEGV */
	if (error_code & PF_USER) {
		/*
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		 * It's possible to have interrupts off here:
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		 */
		local_irq_enable();

		/*
		 * Valid to do another page fault here because this one came
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		 * from user space:
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		 */
		if (is_prefetch(regs, error_code, address))
			return;

		if (is_errata100(regs, address))
			return;

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#ifdef CONFIG_X86_64
		/*
		 * Instruction fetch faults in the vsyscall page might need
		 * emulation.
		 */
		if (unlikely((error_code & PF_INSTR) &&
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			     ((address & ~0xfff) == VSYSCALL_ADDR))) {
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			if (emulate_vsyscall(regs, address))
				return;
		}
#endif
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		/* Kernel addresses are always protection faults: */
		if (address >= TASK_SIZE)
			error_code |= PF_PROT;
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		if (likely(show_unhandled_signals))
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			show_signal_msg(regs, error_code, address, tsk);

		tsk->thread.cr2		= address;
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		tsk->thread.error_code	= error_code;
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		tsk->thread.trap_nr	= X86_TRAP_PF;
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		force_sig_info_fault(SIGSEGV, si_code, address, tsk, 0);
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		return;
	}

	if (is_f00f_bug(regs, address))
		return;

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	no_context(regs, error_code, address, SIGSEGV, si_code);
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}

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static noinline void
bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code,
		     unsigned long address)
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{
	__bad_area_nosemaphore(regs, error_code, address, SEGV_MAPERR);
}

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static void
__bad_area(struct pt_regs *regs, unsigned long error_code,
	   unsigned long address, int si_code)
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{
	struct mm_struct *mm = current->mm;

	/*
	 * Something tried to access memory that isn't in our memory map..
	 * Fix it, but check if it's kernel or user first..
	 */
	up_read(&mm->mmap_sem);

	__bad_area_nosemaphore(regs, error_code, address, si_code);
}

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static noinline void
bad_area(struct pt_regs *regs, unsigned long error_code, unsigned long address)
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{
	__bad_area(regs, error_code, address, SEGV_MAPERR);
}

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static noinline void
bad_area_access_error(struct pt_regs *regs, unsigned long error_code,
		      unsigned long address)
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{
	__bad_area(regs, error_code, address, SEGV_ACCERR);
}

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static void
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do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address,
	  unsigned int fault)
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{
	struct task_struct *tsk = current;
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	int code = BUS_ADRERR;
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	/* Kernel mode? Handle exceptions or die: */
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	if (!(error_code & PF_USER)) {
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		no_context(regs, error_code, address, SIGBUS, BUS_ADRERR);
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		return;
	}
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	/* User-space => ok to do another page fault: */
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	if (is_prefetch(regs, error_code, address))
		return;
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	tsk->thread.cr2		= address;
	tsk->thread.error_code	= error_code;
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	tsk->thread.trap_nr	= X86_TRAP_PF;
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#ifdef CONFIG_MEMORY_FAILURE
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	if (fault & (VM_FAULT_HWPOISON|VM_FAULT_HWPOISON_LARGE)) {
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		printk(KERN_ERR
	"MCE: Killing %s:%d due to hardware memory corruption fault at %lx\n",
			tsk->comm, tsk->pid, address);
		code = BUS_MCEERR_AR;
	}
#endif
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	force_sig_info_fault(SIGBUS, code, address, tsk, fault);
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}

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static noinline void
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mm_fault_error(struct pt_regs *regs, unsigned long error_code,
	       unsigned long address, unsigned int fault)
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{
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	if (fatal_signal_pending(current) && !(error_code & PF_USER)) {
		no_context(regs, error_code, address, 0, 0);
		return;
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	}

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	if (fault & VM_FAULT_OOM) {
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		/* Kernel mode? Handle exceptions or die: */
		if (!(error_code & PF_USER)) {
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			no_context(regs, error_code, address,
				   SIGSEGV, SEGV_MAPERR);
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			return;
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		}

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		/*
		 * We ran out of memory, call the OOM killer, and return the
		 * userspace (which will retry the fault, or kill us if we got
		 * oom-killed):
		 */
		pagefault_out_of_memory();
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	} else {
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		if (fault & (VM_FAULT_SIGBUS|VM_FAULT_HWPOISON|
			     VM_FAULT_HWPOISON_LARGE))
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			do_sigbus(regs, error_code, address, fault);
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		else if (fault & VM_FAULT_SIGSEGV)
			bad_area_nosemaphore(regs, error_code, address);
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		else
			BUG();
	}
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}

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static int spurious_fault_check(unsigned long error_code, pte_t *pte)
{
	if ((error_code & PF_WRITE) && !pte_write(*pte))
		return 0;
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	if ((error_code & PF_INSTR) && !pte_exec(*pte))
		return 0;

	return 1;
}

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/*
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 * Handle a spurious fault caused by a stale TLB entry.
 *
 * This allows us to lazily refresh the TLB when increasing the
 * permissions of a kernel page (RO -> RW or NX -> X).  Doing it
 * eagerly is very expensive since that implies doing a full
 * cross-processor TLB flush, even if no stale TLB entries exist
 * on other processors.
 *
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 * Spurious faults may only occur if the TLB contains an entry with
 * fewer permission than the page table entry.  Non-present (P = 0)
 * and reserved bit (R = 1) faults are never spurious.
 *
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 * There are no security implications to leaving a stale TLB when
 * increasing the permissions on a page.
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 *
 * Returns non-zero if a spurious fault was handled, zero otherwise.
 *
 * See Intel Developer's Manual Vol 3 Section 4.10.4.3, bullet 3
 * (Optional Invalidation).
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 */
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static noinline int
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spurious_fault(unsigned long error_code, unsigned long address)
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{
	pgd_t *pgd;
	pud_t *pud;
	pmd_t *pmd;
	pte_t *pte;
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	int ret;
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	/*
	 * Only writes to RO or instruction fetches from NX may cause
	 * spurious faults.
	 *
	 * These could be from user or supervisor accesses but the TLB
	 * is only lazily flushed after a kernel mapping protection
	 * change, so user accesses are not expected to cause spurious
	 * faults.
	 */
	if (error_code != (PF_WRITE | PF_PROT)
	    && error_code != (PF_INSTR | PF_PROT))
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		return 0;

	pgd = init_mm.pgd + pgd_index(address);
	if (!pgd_present(*pgd))
		return 0;

	pud = pud_offset(pgd, address);
	if (!pud_present(*pud))
		return 0;

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	if (pud_large(*pud))
		return spurious_fault_check(error_code, (pte_t *) pud);

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	pmd = pmd_offset(pud, address);
	if (!pmd_present(*pmd))
		return 0;

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	if (pmd_large(*pmd))
		return spurious_fault_check(error_code, (pte_t *) pmd);

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	pte = pte_offset_kernel(pmd, address);
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	if (!pte_present(*pte))
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		return 0;

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	ret = spurious_fault_check(error_code, pte);
	if (!ret)
		return 0;

	/*
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	 * Make sure we have permissions in PMD.
	 * If not, then there's a bug in the page tables:
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	 */
	ret = spurious_fault_check(error_code, (pte_t *) pmd);
	WARN_ONCE(!ret, "PMD has incorrect permission bits\n");
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	return ret;
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}
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NOKPROBE_SYMBOL(spurious_fault);