Commit 22237d5a authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'fixes-non-critical-for-linus' of...

Merge tag 'fixes-non-critical-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC non-cricitical bug fixes from Arnd Bergmann:
 "These are various bug fixes that were not considered important enough
  for merging into 3.10.

  The majority of the ARM fixes are for the OMAP and at91 platforms, and
  there is another set of bug fixes for device drivers that resolve
  'randconfig' build errors and that the subsystem maintainers either
  did not pick up or preferred to get merged through the arm-soc tree."

* tag 'fixes-non-critical-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (43 commits)
  ARM: at91/PMC: use at91_usb_rate() for UTMI PLL
  ARM: at91/PMC: fix at91sam9n12 USB FS init
  ARM: at91/PMC: at91sam9n12 family has a PLLB
  ARM: at91/PMC: sama5d3 family doesn't have a PLLB
  ARM: tegra: fix section mismatch in tegra_pmc_parse_dt
  ARM: mxs: don't select HAVE_PWM
  ARM: mxs: stub out mxs_pm_init for !CONFIG_PM
  cpuidle: calxeda: select ARM_CPU_SUSPEND
  ARM: mvebu: fix length of ethernet registers in mv78260 dtsi
  ARM: at91: cpuidle: Fix target_residency
  ARM: at91: fix at91_extern_irq usage for non-dt boards
  ARM: sirf: use CONFIG_SIRF rather than CONFIG_PRIMA2 where necessary
  clocksource: kona: adapt to CLOCKSOURCE_OF_DECLARE change
  X.509: do not emit any informational output
  mtd: omap2: allow bulding as a module
  [SCSI] nsp32: use mdelay instead of large udelay constants
  hwrng: bcm2835: fix MODULE_LICENSE tag
  ARM: at91: Change the internal SRAM memory type MT_MEMORY_NONCACHED
  ARM: at91: Fix link breakage when !CONFIG_PHYLIB
  MAINTAINERS: Add exynos filename match to ARM/S5P EXYNOS ARM ARCHITECTURES
  ...
parents fc76a258 6b9a39de
......@@ -797,6 +797,7 @@ F: arch/arm/mach-gemini/
ARM/CSR SIRFPRIMA2 MACHINE SUPPORT
M: Barry Song <baohua.song@csr.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
T: git git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux.git
S: Maintained
F: arch/arm/mach-prima2/
F: drivers/dma/sirf-dma.c
......@@ -1135,6 +1136,7 @@ L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-s5p*/
F: arch/arm/mach-exynos*/
N: exynos
ARM/SAMSUNG MOBILE MACHINE SUPPORT
M: Kyungmin Park <kyungmin.park@samsung.com>
......
......@@ -168,7 +168,7 @@ machine-$(CONFIG_ARCH_OMAP1) += omap1
machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
machine-$(CONFIG_ARCH_ORION5X) += orion5x
machine-$(CONFIG_ARCH_PICOXCELL) += picoxcell
machine-$(CONFIG_ARCH_PRIMA2) += prima2
machine-$(CONFIG_ARCH_SIRF) += prima2
machine-$(CONFIG_ARCH_PXA) += pxa
machine-$(CONFIG_ARCH_REALVIEW) += realview
machine-$(CONFIG_ARCH_RPC) += rpc
......
......@@ -80,7 +80,7 @@ timer@20300 {
sata@a0000 {
compatible = "marvell,orion-sata";
reg = <0xa0000 0x2400>;
reg = <0xa0000 0x5000>;
interrupts = <55>;
clocks = <&gateclk 15>, <&gateclk 30>;
clock-names = "0", "1";
......@@ -96,7 +96,7 @@ mdio {
ethernet@70000 {
compatible = "marvell,armada-370-neta";
reg = <0x70000 0x2500>;
reg = <0x70000 0x4000>;
interrupts = <8>;
clocks = <&gateclk 4>;
status = "disabled";
......@@ -104,7 +104,7 @@ ethernet@70000 {
ethernet@74000 {
compatible = "marvell,armada-370-neta";
reg = <0x74000 0x2500>;
reg = <0x74000 0x4000>;
interrupts = <10>;
clocks = <&gateclk 3>;
status = "disabled";
......
......@@ -92,7 +92,7 @@ gpio2: gpio@18180 {
ethernet@34000 {
compatible = "marvell,armada-370-neta";
reg = <0x34000 0x2500>;
reg = <0x34000 0x4000>;
interrupts = <14>;
clocks = <&gateclk 1>;
status = "disabled";
......
......@@ -107,7 +107,7 @@ gpio2: gpio@18180 {
ethernet@34000 {
compatible = "marvell,armada-370-neta";
reg = <0x34000 0x2500>;
reg = <0x34000 0x4000>;
interrupts = <14>;
clocks = <&gateclk 1>;
status = "disabled";
......
......@@ -88,7 +88,7 @@ system-controller@18200 {
ethernet@30000 {
compatible = "marvell,armada-370-neta";
reg = <0x30000 0x2500>;
reg = <0x30000 0x4000>;
interrupts = <12>;
clocks = <&gateclk 2>;
status = "disabled";
......
......@@ -15,7 +15,7 @@ intc: interrupt-controller@2080000 {
< 0x02081000 0x1000 >;
};
timer@2000004 {
timer@2000000 {
compatible = "qcom,scss-timer", "qcom,msm-timer";
interrupts = <1 0 0x301>,
<1 1 0x301>,
......@@ -26,7 +26,7 @@ timer@2000004 {
cpu-offset = <0x40000>;
};
serial@19c400000 {
serial@19c40000 {
compatible = "qcom,msm-hsuart", "qcom,msm-uart";
reg = <0x19c40000 0x1000>,
<0x19c00000 0x1000>;
......
......@@ -26,7 +26,7 @@ timer@200a000 {
cpu-offset = <0x80000>;
};
serial@19c400000 {
serial@16440000 {
compatible = "qcom,msm-hsuart", "qcom,msm-uart";
reg = <0x16440000 0x1000>,
<0x16400000 0x1000>;
......
......@@ -163,6 +163,7 @@ config MACH_SAMA5_DT
bool "Atmel SAMA5 Evaluation Kits with device-tree support"
depends on SOC_SAMA5
select USE_OF
select PHYLIB if NETDEVICES
help
Select this if you want to experiment device-tree with
an Atmel Evaluation Kit.
......
......@@ -332,10 +332,6 @@ static void __init at91rm9200_initialize(void)
{
arm_pm_idle = at91rm9200_idle;
arm_pm_restart = at91rm9200_restart;
at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
| (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
| (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
| (1 << AT91RM9200_ID_IRQ6);
/* Initialize GPIO subsystem */
at91_gpio_init(at91rm9200_gpio,
......@@ -388,6 +384,10 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
AT91_SOC_START(at91rm9200)
.map_io = at91rm9200_map_io,
.default_irq_priority = at91rm9200_default_irq_priority,
.extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
| (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
| (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
| (1 << AT91RM9200_ID_IRQ6),
.ioremap_registers = at91rm9200_ioremap_registers,
.register_clocks = at91rm9200_register_clocks,
.init = at91rm9200_initialize,
......
......@@ -348,8 +348,6 @@ static void __init at91sam9260_initialize(void)
{
arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
| (1 << AT91SAM9260_ID_IRQ2);
/* Register GPIO subsystem */
at91_gpio_init(at91sam9260_gpio, 3);
......@@ -400,6 +398,8 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
AT91_SOC_START(at91sam9260)
.map_io = at91sam9260_map_io,
.default_irq_priority = at91sam9260_default_irq_priority,
.extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
| (1 << AT91SAM9260_ID_IRQ2),
.ioremap_registers = at91sam9260_ioremap_registers,
.register_clocks = at91sam9260_register_clocks,
.init = at91sam9260_initialize,
......
......@@ -290,8 +290,6 @@ static void __init at91sam9261_initialize(void)
{
arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
| (1 << AT91SAM9261_ID_IRQ2);
/* Register GPIO subsystem */
at91_gpio_init(at91sam9261_gpio, 3);
......@@ -342,6 +340,8 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
AT91_SOC_START(at91sam9261)
.map_io = at91sam9261_map_io,
.default_irq_priority = at91sam9261_default_irq_priority,
.extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
| (1 << AT91SAM9261_ID_IRQ2),
.ioremap_registers = at91sam9261_ioremap_registers,
.register_clocks = at91sam9261_register_clocks,
.init = at91sam9261_initialize,
......
......@@ -327,7 +327,6 @@ static void __init at91sam9263_initialize(void)
{
arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
/* Register GPIO subsystem */
at91_gpio_init(at91sam9263_gpio, 5);
......@@ -378,6 +377,7 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
AT91_SOC_START(at91sam9263)
.map_io = at91sam9263_map_io,
.default_irq_priority = at91sam9263_default_irq_priority,
.extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1),
.ioremap_registers = at91sam9263_ioremap_registers,
.register_clocks = at91sam9263_register_clocks,
.init = at91sam9263_initialize,
......
......@@ -374,7 +374,6 @@ static void __init at91sam9g45_initialize(void)
{
arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9g45_restart;
at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
/* Register GPIO subsystem */
at91_gpio_init(at91sam9g45_gpio, 5);
......@@ -425,6 +424,7 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
AT91_SOC_START(at91sam9g45)
.map_io = at91sam9g45_map_io,
.default_irq_priority = at91sam9g45_default_irq_priority,
.extern_irq = (1 << AT91SAM9G45_ID_IRQ0),
.ioremap_registers = at91sam9g45_ioremap_registers,
.register_clocks = at91sam9g45_register_clocks,
.init = at91sam9g45_initialize,
......
......@@ -293,7 +293,6 @@ static void __init at91sam9rl_initialize(void)
{
arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
/* Register GPIO subsystem */
at91_gpio_init(at91sam9rl_gpio, 4);
......@@ -344,6 +343,7 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
AT91_SOC_START(at91sam9rl)
.map_io = at91sam9rl_map_io,
.default_irq_priority = at91sam9rl_default_irq_priority,
.extern_irq = (1 << AT91SAM9RL_ID_IRQ0),
.ioremap_registers = at91sam9rl_ioremap_registers,
.register_clocks = at91sam9rl_register_clocks,
.init = at91sam9rl_initialize,
......
......@@ -55,8 +55,6 @@ static void at91x40_idle(void)
void __init at91x40_initialize(unsigned long main_clock)
{
arm_pm_idle = at91x40_idle;
at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1)
| (1 << AT91X40_ID_IRQ2);
}
/*
......@@ -86,9 +84,10 @@ static unsigned int at91x40_default_irq_priority[NR_AIC_IRQS] __initdata = {
void __init at91x40_init_interrupts(unsigned int priority[NR_AIC_IRQS])
{
u32 extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1)
| (1 << AT91X40_ID_IRQ2);
if (!priority)
priority = at91x40_default_irq_priority;
at91_aic_init(priority, at91_extern_irq);
at91_aic_init(priority, extern_irq);
}
......@@ -62,7 +62,8 @@ static int ksz9021rn_phy_fixup(struct phy_device *phy)
static void __init sama5_dt_device_init(void)
{
if (of_machine_is_compatible("atmel,sama5d3xcm"))
if (of_machine_is_compatible("atmel,sama5d3xcm") &&
IS_ENABLED(CONFIG_PHYLIB))
phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
ksz9021rn_phy_fixup);
......
......@@ -75,7 +75,7 @@ EXPORT_SYMBOL_GPL(at91_pmc_base);
#define cpu_has_pllb() (!(cpu_is_at91sam9rl() \
|| cpu_is_at91sam9g45() \
|| cpu_is_at91sam9x5() \
|| cpu_is_at91sam9n12()))
|| cpu_is_sama5d3()))
#define cpu_has_upll() (cpu_is_at91sam9g45() \
|| cpu_is_at91sam9x5() \
......@@ -489,7 +489,7 @@ static int at91_clk_show(struct seq_file *s, void *unused)
seq_printf(s, "UCKR = %8x\n", uckr);
}
seq_printf(s, "MCKR = %8x\n", at91_pmc_read(AT91_PMC_MCKR));
if (cpu_has_upll())
if (cpu_has_upll() || cpu_is_at91sam9n12())
seq_printf(s, "USB = %8x\n", at91_pmc_read(AT91_PMC_USB));
seq_printf(s, "SR = %8x\n", sr);
......@@ -614,6 +614,8 @@ static u32 __init at91_usb_rate(struct clk *pll, u32 freq, u32 reg)
{
if (pll == &pllb && (reg & AT91_PMC_USB96M))
return freq / 2;
else if (pll == &utmi_clk || cpu_is_at91sam9n12())
return freq / (1 + ((reg & AT91_PMC_OHCIUSBDIV) >> 8));
else
return freq;
}
......@@ -683,6 +685,8 @@ static struct clk *const standard_pmc_clocks[] __initconst = {
/* PLLB generated USB full speed clock init */
static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock)
{
unsigned int reg;
/*
* USB clock init: choose 48 MHz PLLB value,
* disable 48MHz clock during usb peripheral suspend.
......@@ -691,22 +695,35 @@ static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock)
*/
uhpck.parent = &pllb;
at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | AT91_PMC_USB96M;
reg = at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2);
pllb.rate_hz = at91_pll_rate(&pllb, main_clock, at91_pllb_usb_init);
if (cpu_is_at91rm9200()) {
reg = at91_pllb_usb_init |= AT91_PMC_USB96M;
uhpck.pmc_mask = AT91RM9200_PMC_UHP;
udpck.pmc_mask = AT91RM9200_PMC_UDP;
at91_pmc_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
} else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() ||
cpu_is_at91sam9263() || cpu_is_at91sam9g20() ||
cpu_is_at91sam9g10()) {
reg = at91_pllb_usb_init |= AT91_PMC_USB96M;
uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
udpck.pmc_mask = AT91SAM926x_PMC_UDP;
} else if (cpu_is_at91sam9n12()) {
/* Divider for USB clock is in USB clock register for 9n12 */
reg = AT91_PMC_USBS_PLLB;
/* For PLLB output 96M, set usb divider 2 (USBDIV + 1) */
reg |= AT91_PMC_OHCIUSBDIV_2;
at91_pmc_write(AT91_PMC_USB, reg);
/* Still setup masks */
uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
udpck.pmc_mask = AT91SAM926x_PMC_UDP;
}
at91_pmc_write(AT91_CKGR_PLLBR, 0);
udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, reg);
uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, reg);
}
/* UPLL generated USB full speed clock init */
......@@ -725,8 +742,7 @@ static void __init at91_upll_usbfs_clock_init(unsigned long main_clock)
/* Now set uhpck values */
uhpck.parent = &utmi_clk;
uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
uhpck.rate_hz = utmi_clk.rate_hz;
uhpck.rate_hz /= 1 + ((at91_pmc_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8);
uhpck.rate_hz = at91_usb_rate(&utmi_clk, utmi_clk.rate_hz, usbr);
}
static int __init at91_pmc_init(unsigned long main_clock)
......
......@@ -51,7 +51,7 @@ static struct cpuidle_driver at91_idle_driver = {
.states[1] = {
.enter = at91_enter_idle,
.exit_latency = 10,
.target_residency = 100000,
.target_residency = 10000,
.flags = CPUIDLE_FLAG_TIME_VALID,
.name = "RAM_SR",
.desc = "WFI and DDR Self Refresh",
......
......@@ -85,4 +85,4 @@ extern void __init at91_gpio_irq_setup(void);
extern int __init at91_gpio_of_irq_setup(struct device_node *node,
struct device_node *parent);
extern int at91_extern_irq;
extern u32 at91_get_extern_irq(void);
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