Commit 3c92ec8a authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (144 commits)
  powerpc/44x: Support 16K/64K base page sizes on 44x
  powerpc: Force memory size to be a multiple of PAGE_SIZE
  powerpc/32: Wire up the trampoline code for kdump
  powerpc/32: Add the ability for a classic ppc kernel to be loaded at 32M
  powerpc/32: Allow __ioremap on RAM addresses for kdump kernel
  powerpc/32: Setup OF properties for kdump
  powerpc/32/kdump: Implement crash_setup_regs() using ppc_save_regs()
  powerpc: Prepare xmon_save_regs for use with kdump
  powerpc: Remove default kexec/crash_kernel ops assignments
  powerpc: Make default kexec/crash_kernel ops implicit
  powerpc: Setup OF properties for ppc32 kexec
  powerpc/pseries: Fix cpu hotplug
  powerpc: Fix KVM build on ppc440
  powerpc/cell: add QPACE as a separate Cell platform
  powerpc/cell: fix build breakage with CONFIG_SPUFS disabled
  powerpc/mpc5200: fix error paths in PSC UART probe function
  powerpc/mpc5200: add rts/cts handling in PSC UART driver
  powerpc/mpc5200: Make PSC UART driver update serial errors counters
  powerpc/mpc5200: Remove obsolete code from mpc5200 MDIO driver
  powerpc/mpc5200: Add MDMA/UDMA support to MPC5200 ATA driver
  ...

Fix trivial conflict in drivers/char/Makefile as per Paul's directions
parents c4c9f018 ca9153a3
......@@ -285,6 +285,10 @@ config IOMMU_VMERGE
config IOMMU_HELPER
def_bool PPC64
config PPC_NEED_DMA_SYNC_OPS
def_bool y
depends on NOT_COHERENT_CACHE
config HOTPLUG_CPU
bool "Support for enabling/disabling CPUs"
depends on SMP && HOTPLUG && EXPERIMENTAL && (PPC_PSERIES || PPC_PMAC)
......@@ -322,7 +326,7 @@ config KEXEC
config CRASH_DUMP
bool "Build a kdump crash kernel"
depends on PPC_MULTIPLATFORM && PPC64 && RELOCATABLE
depends on (PPC64 && RELOCATABLE) || 6xx
help
Build a kernel suitable for use as a kdump capture kernel.
The same kernel binary can be used as production kernel and dump
......@@ -401,23 +405,53 @@ config PPC_HAS_HASH_64K
depends on PPC64
default n
config PPC_64K_PAGES
bool "64k page size"
depends on PPC64
select PPC_HAS_HASH_64K
choice
prompt "Page size"
default PPC_4K_PAGES
help
This option changes the kernel logical page size to 64k. On machines
without processor support for 64k pages, the kernel will simulate
them by loading each individual 4k page on demand transparently,
while on hardware with such support, it will be used to map
normal application pages.
Select the kernel logical page size. Increasing the page size
will reduce software overhead at each page boundary, allow
hardware prefetch mechanisms to be more effective, and allow
larger dma transfers increasing IO efficiency and reducing
overhead. However the utilization of memory will increase.
For example, each cached file will using a multiple of the
page size to hold its contents and the difference between the
end of file and the end of page is wasted.
Some dedicated systems, such as software raid serving with
accelerated calculations, have shown significant increases.
If you configure a 64 bit kernel for 64k pages but the
processor does not support them, then the kernel will simulate
them with 4k pages, loading them on demand, but with the
reduced software overhead and larger internal fragmentation.
For the 32 bit kernel, a large page option will not be offered
unless it is supported by the configured processor.
If unsure, choose 4K_PAGES.
config PPC_4K_PAGES
bool "4k page size"
config PPC_16K_PAGES
bool "16k page size" if 44x
config PPC_64K_PAGES
bool "64k page size" if 44x || PPC_STD_MMU_64
select PPC_HAS_HASH_64K if PPC_STD_MMU_64
endchoice
config FORCE_MAX_ZONEORDER
int "Maximum zone order"
range 9 64 if PPC_64K_PAGES
default "9" if PPC_64K_PAGES
range 13 64 if PPC64 && !PPC_64K_PAGES
default "13" if PPC64 && !PPC_64K_PAGES
range 9 64 if PPC_STD_MMU_64 && PPC_64K_PAGES
default "9" if PPC_STD_MMU_64 && PPC_64K_PAGES
range 13 64 if PPC_STD_MMU_64 && !PPC_64K_PAGES
default "13" if PPC_STD_MMU_64 && !PPC_64K_PAGES
range 9 64 if PPC_STD_MMU_32 && PPC_16K_PAGES
default "9" if PPC_STD_MMU_32 && PPC_16K_PAGES
range 7 64 if PPC_STD_MMU_32 && PPC_64K_PAGES
default "7" if PPC_STD_MMU_32 && PPC_64K_PAGES
range 11 64
default "11"
help
......@@ -437,7 +471,7 @@ config FORCE_MAX_ZONEORDER
config PPC_SUBPAGE_PROT
bool "Support setting protections for 4k subpages"
depends on PPC_64K_PAGES
depends on PPC_STD_MMU_64 && PPC_64K_PAGES
help
This option adds support for a system call to allow user programs
to set access permissions (read/write, readonly, or no access)
......
......@@ -2,6 +2,15 @@ menu "Kernel hacking"
source "lib/Kconfig.debug"
config PRINT_STACK_DEPTH
int "Stack depth to print" if DEBUG_KERNEL
default 64
help
This option allows you to set the stack depth that the kernel
prints in stack traces. This can be useful if your display is
too small and stack traces cause important information to
scroll off the screen.
config DEBUG_STACKOVERFLOW
bool "Check for stack overflows"
depends on DEBUG_KERNEL
......
......@@ -107,7 +107,6 @@ KBUILD_CFLAGS += $(call cc-option,-mno-altivec)
# (We use all available options to help semi-broken compilers)
KBUILD_CFLAGS += $(call cc-option,-mno-spe)
KBUILD_CFLAGS += $(call cc-option,-mspe=no)
KBUILD_CFLAGS += $(call cc-option,-mabi=no-spe)
# Enable unit-at-a-time mode when possible. It shrinks the
# kernel considerably.
......
......@@ -194,6 +194,7 @@ image-$(CONFIG_PPC_MAPLE) += zImage.pseries
image-$(CONFIG_PPC_IBM_CELL_BLADE) += zImage.pseries
image-$(CONFIG_PPC_PS3) += dtbImage.ps3
image-$(CONFIG_PPC_CELLEB) += zImage.pseries
image-$(CONFIG_PPC_CELL_QPACE) += zImage.pseries
image-$(CONFIG_PPC_CHRP) += zImage.chrp
image-$(CONFIG_PPC_EFIKA) += zImage.chrp
image-$(CONFIG_PPC_PMAC) += zImage.pmac
......
......@@ -213,7 +213,7 @@ static int find_range(u32 *reg, u32 *ranges, int nregaddr,
u32 range_addr[MAX_ADDR_CELLS];
u32 range_size[MAX_ADDR_CELLS];
copy_val(range_addr, ranges + i, naddr);
copy_val(range_addr, ranges + i, nregaddr);
copy_val(range_size, ranges + i + nregaddr + naddr, nsize);
if (compare_reg(reg, range_addr, range_size))
......
......@@ -269,7 +269,8 @@ PCI0: pci@ec000000 {
* later cannot be changed. Chip supports a second
* IO range but we don't use it for now
*/
ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000
ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x40000000
0x02000000 0x00000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00100000
0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
......
......@@ -40,6 +40,7 @@ cpu@0 {
d-cache-size = <32768>;
dcr-controller;
dcr-access-method = "native";
next-level-cache = <&L2C0>;
};
};
......@@ -104,6 +105,16 @@ CPR0: cpr {
dcr-reg = <0x00c 0x002>;
};
L2C0: l2c {
compatible = "ibm,l2-cache-460ex", "ibm,l2-cache";
dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
0x030 0x008>; /* L2 cache DCR's */
cache-line-size = <32>; /* 32 bytes */
cache-size = <262144>; /* L2, 256K */
interrupt-parent = <&UIC1>;
interrupts = <11 1>;
};
plb {
compatible = "ibm,plb-460ex", "ibm,plb4";
#address-cells = <2>;
......@@ -343,6 +354,7 @@ PCIX0: pci@c0ec00000 {
* later cannot be changed
*/
ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000
0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
......@@ -373,6 +385,7 @@ PCIE0: pciex@d00000000 {
* later cannot be changed
*/
ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
......@@ -414,6 +427,7 @@ PCIE1: pciex@d20000000 {
* later cannot be changed
*/
ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000
0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
......
......@@ -98,6 +98,12 @@ gef_pic: pic@4,4000 {
interrupt-parent = <&mpic>;
};
gef_gpio: gpio@7,14000 {
#gpio-cells = <2>;
compatible = "gef,sbc610-gpio";
reg = <0x7 0x14000 0x24>;
gpio-controller;
};
};
soc@fef00000 {
......@@ -119,6 +125,11 @@ i2c1: i2c@3000 {
interrupt-parent = <&mpic>;
dfsrr;
rtc@51 {
compatible = "epson,rx8581";
reg = <0x00000051>;
};
eti@6b {
compatible = "dallas,ds1682";
reg = <0x6b>;
......
......@@ -76,7 +76,6 @@ i2c@80003000 {
interrupt-parent = <&mpic>;
rtc@32 {
device_type = "rtc";
compatible = "ricoh,rs5c372a";
reg = <0x32>;
};
......
......@@ -76,7 +76,6 @@ i2c@80003000 {
interrupt-parent = <&mpic>;
rtc@32 {
device_type = "rtc";
compatible = "ricoh,rs5c372a";
reg = <0x32>;
};
......
......@@ -130,7 +130,6 @@ timer@670 { // General Purpose Timer
rtc@800 { // Real time clock
compatible = "fsl,mpc5200-rtc";
device_type = "rtc";
reg = <0x800 0x100>;
interrupts = <1 5 0 1 6 0>;
interrupt-parent = <&mpc5200_pic>;
......
......@@ -130,7 +130,6 @@ timer@670 { // General Purpose Timer
rtc@800 { // Real time clock
compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
device_type = "rtc";
reg = <0x800 0x100>;
interrupts = <1 5 0 1 6 0>;
interrupt-parent = <&mpc5200_pic>;
......
......@@ -248,7 +248,6 @@ i2c@3d40 {
fsl5200-clocking;
rtc@68 {
device_type = "rtc";
compatible = "dallas,ds1339";
reg = <0x68>;
};
......
......@@ -117,7 +117,6 @@ i2c@3000 {
interrupt-parent = <&ipic>;
dfsrr;
rtc@68 {
device_type = "rtc";
compatible = "dallas,ds1339";
reg = <0x68>;
};
......
......@@ -85,7 +85,6 @@ i2c@3100 {
dfsrr;
rtc@68 {
device_type = "rtc";
compatible = "dallas,ds1339";
reg = <0x68>;
interrupts = <18 0x8>;
......
......@@ -83,7 +83,6 @@ i2c@3100 {
dfsrr;
rtc@68 {
device_type = "rtc";
compatible = "dallas,ds1339";
reg = <0x68>;
interrupts = <18 0x8>;
......
......@@ -117,7 +117,6 @@ i2c@3000 {
interrupt-parent = <&ipic>;
dfsrr;
rtc@68 {
device_type = "rtc";
compatible = "dallas,ds1339";
reg = <0x68>;
};
......
......@@ -117,7 +117,6 @@ i2c@3000 {
interrupt-parent = <&ipic>;
dfsrr;
rtc@68 {
device_type = "rtc";
compatible = "dallas,ds1339";
reg = <0x68>;
};
......
......@@ -117,7 +117,6 @@ i2c@3000 {
interrupt-parent = <&ipic>;
dfsrr;
rtc@68 {
device_type = "rtc";
compatible = "dallas,ds1339";
reg = <0x68>;
};
......
......@@ -63,6 +63,119 @@ memory {
device_type = "memory";
};
localbus@ffe05000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
reg = <0 0xffe05000 0 0x1000>;
interrupts = <19 2>;
interrupt-parent = <&mpic>;
ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
0x1 0x0 0x0 0xe0000000 0x08000000
0x2 0x0 0x0 0xffa00000 0x00040000
0x3 0x0 0x0 0xffdf0000 0x00008000
0x4 0x0 0x0 0xffa40000 0x00040000
0x5 0x0 0x0 0xffa80000 0x00040000
0x6 0x0 0x0 0xffac0000 0x00040000>;
nor@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x8000000>;
bank-width = <2>;
device-width = <1>;
ramdisk@0 {
reg = <0x0 0x03000000>;
readl-only;
};
diagnostic@3000000 {
reg = <0x03000000 0x00e00000>;
read-only;
};
dink@3e00000 {
reg = <0x03e00000 0x00200000>;
read-only;
};
kernel@4000000 {
reg = <0x04000000 0x00400000>;
read-only;
};
jffs2@4400000 {
reg = <0x04400000 0x03b00000>;
};
dtb@7f00000 {
reg = <0x07f00000 0x00080000>;
read-only;
};
u-boot@7f80000 {
reg = <0x07f80000 0x00080000>;
read-only;
};
};
nand@2,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8572-fcm-nand",
"fsl,elbc-fcm-nand";
reg = <0x2 0x0 0x40000>;
u-boot@0 {
reg = <0x0 0x02000000>;
read-only;
};
jffs2@2000000 {
reg = <0x02000000 0x10000000>;
};
ramdisk@12000000 {
reg = <0x12000000 0x08000000>;
read-only;
};
kernel@1a000000 {
reg = <0x1a000000 0x04000000>;
};
dtb@1e000000 {
reg = <0x1e000000 0x01000000>;
read-only;
};
empty@1f000000 {
reg = <0x1f000000 0x21000000>;
};
};
nand@4,0 {
compatible = "fsl,mpc8572-fcm-nand",
"fsl,elbc-fcm-nand";
reg = <0x4 0x0 0x40000>;
};
nand@5,0 {
compatible = "fsl,mpc8572-fcm-nand",
"fsl,elbc-fcm-nand";
reg = <0x5 0x0 0x40000>;
};
nand@6,0 {
compatible = "fsl,mpc8572-fcm-nand",
"fsl,elbc-fcm-nand";
reg = <0x6 0x0 0x40000>;
};
};
soc8572@ffe00000 {
#address-cells = <1>;
#size-cells = <1>;
......
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