Commit 4fa086b9 authored by Leo (Sunpeng) Li's avatar Leo (Sunpeng) Li Committed by Alex Deucher

drm/amd/display: Roll core_stream into dc_stream

Signed-off-by: default avatarLeo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2248eb6b
......@@ -1401,7 +1401,7 @@ static int amdgpu_notify_freesync(struct drm_device *dev, void *data,
num_streams = dc_get_current_stream_count(adev->dm.dc);
for (i = 0; i < num_streams; i++) {
const struct dc_stream *stream;
struct dc_stream *stream;
stream = dc_get_stream_at_index(adev->dm.dc, i);
mod_freesync_update_state(adev->dm.freesync_module,
......
......@@ -2196,7 +2196,7 @@ static bool is_scaling_state_different(
static void remove_stream(
struct amdgpu_device *adev,
struct amdgpu_crtc *acrtc,
const struct dc_stream *stream)
struct dc_stream *stream)
{
/* this is the update mode case */
if (adev->dm.freesync_module)
......@@ -2351,7 +2351,7 @@ static void amdgpu_dm_commit_surfaces(struct drm_atomic_state *state,
uint32_t i;
struct drm_plane *plane;
struct drm_plane_state *old_plane_state;
const struct dc_stream *dc_stream_attach;
struct dc_stream *dc_stream_attach;
struct dc_surface *dc_surfaces_constructed[MAX_SURFACES];
struct amdgpu_crtc *acrtc_attach = to_amdgpu_crtc(pcrtc);
struct dm_crtc_state *acrtc_state = to_dm_crtc_state(pcrtc->state);
......@@ -2487,7 +2487,7 @@ void amdgpu_dm_atomic_commit_tail(
struct drm_crtc *crtc, *pcrtc;
struct drm_crtc_state *old_crtc_state;
struct amdgpu_crtc *new_crtcs[MAX_STREAMS];
const struct dc_stream *new_stream;
struct dc_stream *new_stream = NULL;
unsigned long flags;
bool wait_for_vblank = true;
struct drm_connector *connector;
......@@ -2822,8 +2822,8 @@ static uint32_t add_val_sets_surface(
static uint32_t update_in_val_sets_stream(
struct dc_validation_set *val_sets,
uint32_t set_count,
const struct dc_stream *old_stream,
const struct dc_stream *new_stream,
struct dc_stream *old_stream,
struct dc_stream *new_stream,
struct drm_crtc *crtc)
{
uint32_t i = 0;
......
......@@ -45,7 +45,7 @@ struct dm_plane_state {
struct dm_crtc_state {
struct drm_crtc_state base;
const struct dc_stream *stream;
struct dc_stream *stream;
};
#define to_dm_crtc_state(x) container_of(x, struct dm_crtc_state, base)
......
......@@ -2610,9 +2610,9 @@ static void populate_initial_data(
data->fbc_en[num_displays + 4] = false;
data->lpt_en[num_displays + 4] = false;
data->h_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->public.timing.h_total);
data->v_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->public.timing.v_total);
data->pixel_rate[num_displays + 4] = bw_frc_to_fixed(pipe[i].stream->public.timing.pix_clk_khz, 1000);
data->h_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.h_total);
data->v_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.v_total);
data->pixel_rate[num_displays + 4] = bw_frc_to_fixed(pipe[i].stream->timing.pix_clk_khz, 1000);
data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].scl_data.viewport.width);
data->pitch_in_pixels[num_displays + 4] = data->src_width[num_displays + 4];
data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].scl_data.viewport.height);
......@@ -2707,9 +2707,9 @@ static void populate_initial_data(
data->fbc_en[num_displays + 4] = false;
data->lpt_en[num_displays + 4] = false;
data->h_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->public.timing.h_total);
data->v_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->public.timing.v_total);
data->pixel_rate[num_displays + 4] = bw_frc_to_fixed(pipe[i].stream->public.timing.pix_clk_khz, 1000);
data->h_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.h_total);
data->v_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.v_total);
data->pixel_rate[num_displays + 4] = bw_frc_to_fixed(pipe[i].stream->timing.pix_clk_khz, 1000);
if (pipe[i].surface) {
data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].scl_data.viewport.width);
data->pitch_in_pixels[num_displays + 4] = data->src_width[num_displays + 4];
......@@ -2759,9 +2759,9 @@ static void populate_initial_data(
break;
}
} else {
data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->public.timing.h_addressable);
data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.h_addressable);
data->pitch_in_pixels[num_displays + 4] = data->src_width[num_displays + 4];
data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->public.timing.v_addressable);
data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.v_addressable);
data->h_taps[num_displays + 4] = bw_int_to_fixed(1);
data->v_taps[num_displays + 4] = bw_int_to_fixed(1);
data->h_scale_ratio[num_displays + 4] = bw_int_to_fixed(1);
......
......@@ -365,7 +365,7 @@ static void pipe_ctx_to_e2e_pipe_params (
}
input->dest.vactive = pipe->stream->public.timing.v_addressable;
input->dest.vactive = pipe->stream->timing.v_addressable;
input->dest.recout_width = pipe->scl_data.recout.width;
input->dest.recout_height = pipe->scl_data.recout.height;
......@@ -373,24 +373,24 @@ static void pipe_ctx_to_e2e_pipe_params (
input->dest.full_recout_width = pipe->scl_data.recout.width;
input->dest.full_recout_height = pipe->scl_data.recout.height;
input->dest.htotal = pipe->stream->public.timing.h_total;
input->dest.hblank_start = input->dest.htotal - pipe->stream->public.timing.h_front_porch;
input->dest.htotal = pipe->stream->timing.h_total;
input->dest.hblank_start = input->dest.htotal - pipe->stream->timing.h_front_porch;
input->dest.hblank_end = input->dest.hblank_start
- pipe->stream->public.timing.h_addressable
- pipe->stream->public.timing.h_border_left
- pipe->stream->public.timing.h_border_right;
- pipe->stream->timing.h_addressable
- pipe->stream->timing.h_border_left
- pipe->stream->timing.h_border_right;
input->dest.vtotal = pipe->stream->public.timing.v_total;
input->dest.vblank_start = input->dest.vtotal - pipe->stream->public.timing.v_front_porch;
input->dest.vtotal = pipe->stream->timing.v_total;
input->dest.vblank_start = input->dest.vtotal - pipe->stream->timing.v_front_porch;
input->dest.vblank_end = input->dest.vblank_start
- pipe->stream->public.timing.v_addressable
- pipe->stream->public.timing.v_border_bottom
- pipe->stream->public.timing.v_border_top;
input->dest.vsync_plus_back_porch = pipe->stream->public.timing.v_total
- pipe->stream->public.timing.v_addressable
- pipe->stream->public.timing.v_front_porch;
input->dest.pixel_rate_mhz = pipe->stream->public.timing.pix_clk_khz/1000.0;
- pipe->stream->timing.v_addressable
- pipe->stream->timing.v_border_bottom
- pipe->stream->timing.v_border_top;
input->dest.vsync_plus_back_porch = pipe->stream->timing.v_total
- pipe->stream->timing.v_addressable
- pipe->stream->timing.v_front_porch;
input->dest.pixel_rate_mhz = pipe->stream->timing.pix_clk_khz/1000.0;
input->dest.vstartup_start = pipe->pipe_dlg_param.vstartup_start;
input->dest.vupdate_offset = pipe->pipe_dlg_param.vupdate_offset;
input->dest.vupdate_offset = pipe->pipe_dlg_param.vupdate_offset;
......@@ -851,14 +851,14 @@ bool dcn_validate_bandwidth(
v->underscan_output[input_idx] = false; /* taken care of in recout already*/
v->interlace_output[input_idx] = false;
v->htotal[input_idx] = pipe->stream->public.timing.h_total;
v->vtotal[input_idx] = pipe->stream->public.timing.v_total;
v->v_sync_plus_back_porch[input_idx] = pipe->stream->public.timing.v_total
- pipe->stream->public.timing.v_addressable
- pipe->stream->public.timing.v_front_porch;
v->vactive[input_idx] = pipe->stream->public.timing.v_addressable;
v->pixel_clock[input_idx] = pipe->stream->public.timing.pix_clk_khz / 1000.0f;
if (pipe->stream->public.timing.pixel_encoding == PIXEL_ENCODING_YCBCR420)
v->htotal[input_idx] = pipe->stream->timing.h_total;
v->vtotal[input_idx] = pipe->stream->timing.v_total;
v->v_sync_plus_back_porch[input_idx] = pipe->stream->timing.v_total
- pipe->stream->timing.v_addressable
- pipe->stream->timing.v_front_porch;
v->vactive[input_idx] = pipe->stream->timing.v_addressable;
v->pixel_clock[input_idx] = pipe->stream->timing.pix_clk_khz / 1000.0f;
if (pipe->stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR420)
v->pixel_clock[input_idx] /= 2;
......@@ -867,10 +867,10 @@ bool dcn_validate_bandwidth(
v->source_pixel_format[input_idx] = dcn_bw_rgb_sub_32;
v->source_surface_mode[input_idx] = dcn_bw_sw_4_kb_s;
v->lb_bit_per_pixel[input_idx] = 30;
v->viewport_width[input_idx] = pipe->stream->public.timing.h_addressable;
v->viewport_height[input_idx] = pipe->stream->public.timing.v_addressable;
v->scaler_rec_out_width[input_idx] = pipe->stream->public.timing.h_addressable;
v->scaler_recout_height[input_idx] = pipe->stream->public.timing.v_addressable;
v->viewport_width[input_idx] = pipe->stream->timing.h_addressable;
v->viewport_height[input_idx] = pipe->stream->timing.v_addressable;
v->scaler_rec_out_width[input_idx] = pipe->stream->timing.h_addressable;
v->scaler_recout_height[input_idx] = pipe->stream->timing.v_addressable;
v->override_hta_ps[input_idx] = 1;
v->override_vta_ps[input_idx] = 1;
v->override_hta_pschroma[input_idx] = 1;
......@@ -995,22 +995,22 @@ bool dcn_validate_bandwidth(
pipe->pipe_dlg_param.vready_offset = v->v_ready_offset[input_idx];
pipe->pipe_dlg_param.vstartup_start = v->v_startup[input_idx];
pipe->pipe_dlg_param.htotal = pipe->stream->public.timing.h_total;
pipe->pipe_dlg_param.vtotal = pipe->stream->public.timing.v_total;
vesa_sync_start = pipe->stream->public.timing.v_addressable +
pipe->stream->public.timing.v_border_bottom +
pipe->stream->public.timing.v_front_porch;
pipe->pipe_dlg_param.htotal = pipe->stream->timing.h_total;
pipe->pipe_dlg_param.vtotal = pipe->stream->timing.v_total;
vesa_sync_start = pipe->stream->timing.v_addressable +
pipe->stream->timing.v_border_bottom +
pipe->stream->timing.v_front_porch;
asic_blank_end = (pipe->stream->public.timing.v_total -
asic_blank_end = (pipe->stream->timing.v_total -
vesa_sync_start -
pipe->stream->public.timing.v_border_top)
* (pipe->stream->public.timing.flags.INTERLACE ? 1 : 0);
pipe->stream->timing.v_border_top)
* (pipe->stream->timing.flags.INTERLACE ? 1 : 0);
asic_blank_start = asic_blank_end +
(pipe->stream->public.timing.v_border_top +
pipe->stream->public.timing.v_addressable +
pipe->stream->public.timing.v_border_bottom)
* (pipe->stream->public.timing.flags.INTERLACE ? 1 : 0);
(pipe->stream->timing.v_border_top +
pipe->stream->timing.v_addressable +
pipe->stream->timing.v_border_bottom)
* (pipe->stream->timing.flags.INTERLACE ? 1 : 0);
pipe->pipe_dlg_param.vblank_start = asic_blank_start;
pipe->pipe_dlg_param.vblank_end = asic_blank_end;
......@@ -1019,13 +1019,13 @@ bool dcn_validate_bandwidth(
struct pipe_ctx *hsplit_pipe = pipe->bottom_pipe;
if (v->dpp_per_plane[input_idx] == 2 ||
((pipe->stream->public.view_format ==
((pipe->stream->view_format ==
VIEW_3D_FORMAT_SIDE_BY_SIDE ||
pipe->stream->public.view_format ==
pipe->stream->view_format ==
VIEW_3D_FORMAT_TOP_AND_BOTTOM) &&
(pipe->stream->public.timing.timing_3d_format ==
(pipe->stream->timing.timing_3d_format ==
TIMING_3D_FORMAT_TOP_AND_BOTTOM ||
pipe->stream->public.timing.timing_3d_format ==
pipe->stream->timing.timing_3d_format ==
TIMING_3D_FORMAT_SIDE_BY_SIDE))) {
if (hsplit_pipe && hsplit_pipe->surface == pipe->surface) {
/* update previously split pipe */
......@@ -1034,8 +1034,8 @@ bool dcn_validate_bandwidth(
hsplit_pipe->pipe_dlg_param.vready_offset = v->v_ready_offset[input_idx];
hsplit_pipe->pipe_dlg_param.vstartup_start = v->v_startup[input_idx];
hsplit_pipe->pipe_dlg_param.htotal = pipe->stream->public.timing.h_total;
hsplit_pipe->pipe_dlg_param.vtotal = pipe->stream->public.timing.v_total;
hsplit_pipe->pipe_dlg_param.htotal = pipe->stream->timing.h_total;
hsplit_pipe->pipe_dlg_param.vtotal = pipe->stream->timing.v_total;
hsplit_pipe->pipe_dlg_param.vblank_start = pipe->pipe_dlg_param.vblank_start;
hsplit_pipe->pipe_dlg_param.vblank_end = pipe->pipe_dlg_param.vblank_end;
} else {
......
This diff is collapsed.
......@@ -321,8 +321,8 @@ void context_timing_trace(
TIMING_TRACE("OTG_%d H_tot:%d V_tot:%d H_pos:%d V_pos:%d\n",
pipe_ctx->tg->inst,
pipe_ctx->stream->public.timing.h_total,
pipe_ctx->stream->public.timing.v_total,
pipe_ctx->stream->timing.h_total,
pipe_ctx->stream->timing.v_total,
h_pos[i], v_pos[i]);
}
}
......
......@@ -1143,7 +1143,7 @@ static void dpcd_configure_panel_mode(
static void enable_stream_features(struct pipe_ctx *pipe_ctx)
{
struct core_stream *stream = pipe_ctx->stream;
struct dc_stream *stream = pipe_ctx->stream;
struct dc_link *link = stream->sink->link;
union down_spread_ctrl downspread;
......@@ -1151,7 +1151,7 @@ static void enable_stream_features(struct pipe_ctx *pipe_ctx)
&downspread.raw, sizeof(downspread));
downspread.bits.IGNORE_MSA_TIMING_PARAM =
(stream->public.ignore_msa_timing_param) ? 1 : 0;
(stream->ignore_msa_timing_param) ? 1 : 0;
core_link_write_dpcd(link, DP_DOWNSPREAD_CTRL,
&downspread.raw, sizeof(downspread));
......@@ -1159,7 +1159,7 @@ static void enable_stream_features(struct pipe_ctx *pipe_ctx)
static enum dc_status enable_link_dp(struct pipe_ctx *pipe_ctx)
{
struct core_stream *stream = pipe_ctx->stream;
struct dc_stream *stream = pipe_ctx->stream;
enum dc_status status;
bool skip_video_pattern;
struct dc_link *link = stream->sink->link;
......@@ -1250,7 +1250,7 @@ static enum dc_status enable_link_dp_mst(struct pipe_ctx *pipe_ctx)
static void enable_link_hdmi(struct pipe_ctx *pipe_ctx)
{
struct core_stream *stream = pipe_ctx->stream;
struct dc_stream *stream = pipe_ctx->stream;
struct dc_link *link = stream->sink->link;
enum dc_color_depth display_color_depth;
......@@ -1258,13 +1258,13 @@ static void enable_link_hdmi(struct pipe_ctx *pipe_ctx)
dal_ddc_service_write_scdc_data(
stream->sink->link->ddc,
stream->phy_pix_clk,
stream->public.timing.flags.LTE_340MCSC_SCRAMBLE);
stream->timing.flags.LTE_340MCSC_SCRAMBLE);
memset(&stream->sink->link->cur_link_settings, 0,
sizeof(struct dc_link_settings));
display_color_depth = stream->public.timing.display_color_depth;
if (stream->public.timing.pixel_encoding == PIXEL_ENCODING_YCBCR422)
display_color_depth = stream->timing.display_color_depth;
if (stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR422)
display_color_depth = COLOR_DEPTH_888;
link->link_enc->funcs->enable_tmds_output(
......@@ -1341,7 +1341,7 @@ static void disable_link(struct dc_link *link, enum signal_type signal)
}
enum dc_status dc_link_validate_mode_timing(
const struct core_stream *stream,
const struct dc_stream *stream,
struct dc_link *link,
const struct dc_crtc_timing *timing)
{
......@@ -1377,7 +1377,6 @@ bool dc_link_set_backlight_level(const struct dc_link *link, uint32_t level,
uint32_t frame_ramp, const struct dc_stream *stream)
{
struct core_dc *core_dc = DC_TO_CORE(link->ctx->dc);
struct core_stream *core_stream = NULL;
struct abm *abm = core_dc->res_pool->abm;
unsigned int controller_id = 0;
int i;
......@@ -1390,11 +1389,10 @@ bool dc_link_set_backlight_level(const struct dc_link *link, uint32_t level,
if (dc_is_embedded_signal(link->connector_signal)) {
if (stream != NULL) {
core_stream = DC_STREAM_TO_CORE(stream);
for (i = 0; i < MAX_PIPES; i++) {
if (core_dc->current_context->res_ctx.
pipe_ctx[i].stream
== core_stream)
== stream)
/* DMCU -1 for all controller id values,
* therefore +1 here
*/
......@@ -1457,7 +1455,6 @@ bool dc_link_setup_psr(struct dc_link *link,
{
struct core_dc *core_dc = DC_TO_CORE(link->ctx->dc);
struct dmcu *dmcu = core_dc->res_pool->dmcu;
struct core_stream *core_stream = DC_STREAM_TO_CORE(stream);
int i;
psr_context->controllerId = CONTROLLER_ID_UNDEFINED;
......@@ -1501,7 +1498,7 @@ bool dc_link_setup_psr(struct dc_link *link,
for (i = 0; i < MAX_PIPES; i++) {
if (core_dc->current_context->res_ctx.pipe_ctx[i].stream
== core_stream) {
== stream) {
/* dmcu -1 for all controller id values,
* therefore +1 here
*/
......@@ -1590,7 +1587,7 @@ void core_link_resume(struct dc_link *link)
program_hpd_filter(link);
}
static struct fixed31_32 get_pbn_per_slot(struct core_stream *stream)
static struct fixed31_32 get_pbn_per_slot(struct dc_stream *stream)
{
struct dc_link_settings *link_settings =
&stream->sink->link->cur_link_settings;
......@@ -1699,7 +1696,7 @@ static void update_mst_stream_alloc_table(
*/
static enum dc_status allocate_mst_payload(struct pipe_ctx *pipe_ctx)
{
struct core_stream *stream = pipe_ctx->stream;
struct dc_stream *stream = pipe_ctx->stream;
struct dc_link *link = stream->sink->link;
struct link_encoder *link_encoder = link->link_enc;
struct stream_encoder *stream_encoder = pipe_ctx->stream_enc;
......@@ -1717,7 +1714,7 @@ static enum dc_status allocate_mst_payload(struct pipe_ctx *pipe_ctx)
/* get calculate VC payload for stream: stream_alloc */
if (dm_helpers_dp_mst_write_payload_allocation_table(
stream->ctx,
&stream->public,
stream,
&proposed_table,
true)) {
update_mst_stream_alloc_table(
......@@ -1759,11 +1756,11 @@ static enum dc_status allocate_mst_payload(struct pipe_ctx *pipe_ctx)
/* send down message */
dm_helpers_dp_mst_poll_for_allocation_change_trigger(
stream->ctx,
&stream->public);
stream);
dm_helpers_dp_mst_send_payload_allocation(
stream->ctx,
&stream->public,
stream,
true);
/* slot X.Y for only current stream */
......@@ -1781,7 +1778,7 @@ static enum dc_status allocate_mst_payload(struct pipe_ctx *pipe_ctx)
static enum dc_status deallocate_mst_payload(struct pipe_ctx *pipe_ctx)
{
struct core_stream *stream = pipe_ctx->stream;
struct dc_stream *stream = pipe_ctx->stream;
struct dc_link *link = stream->sink->link;
struct link_encoder *link_encoder = link->link_enc;
struct stream_encoder *stream_encoder = pipe_ctx->stream_enc;
......@@ -1806,7 +1803,7 @@ static enum dc_status deallocate_mst_payload(struct pipe_ctx *pipe_ctx)
if (mst_mode) {
if (dm_helpers_dp_mst_write_payload_allocation_table(
stream->ctx,
&stream->public,
stream,
&proposed_table,
false)) {
......@@ -1848,11 +1845,11 @@ static enum dc_status deallocate_mst_payload(struct pipe_ctx *pipe_ctx)
if (mst_mode) {
dm_helpers_dp_mst_poll_for_allocation_change_trigger(
stream->ctx,
&stream->public);
stream);
dm_helpers_dp_mst_send_payload_allocation(
stream->ctx,
&stream->public,
stream,
false);
}
......
......@@ -1434,7 +1434,7 @@ bool dp_validate_mode_timing(
return false;
}
void decide_link_settings(struct core_stream *stream,
void decide_link_settings(struct dc_stream *stream,
struct dc_link_settings *link_setting)
{
......@@ -1446,8 +1446,7 @@ void decide_link_settings(struct core_stream *stream,
uint32_t req_bw;
uint32_t link_bw;
req_bw = bandwidth_in_kbps_from_timing(
&stream->public.timing);
req_bw = bandwidth_in_kbps_from_timing(&stream->timing);
link = stream->sink->link;
......@@ -2327,7 +2326,7 @@ static void set_crtc_test_pattern(struct dc_link *link,
{
enum controller_dp_test_pattern controller_test_pattern;
enum dc_color_depth color_depth = pipe_ctx->
stream->public.timing.display_color_depth;
stream->timing.display_color_depth;
struct bit_depth_reduction_params params;
memset(&params, 0, sizeof(params));
......
......@@ -78,7 +78,7 @@ void dp_enable_link_phy(
pipes[i].clock_source->id != CLOCK_SOURCE_ID_DP_DTO) {
pipes[i].clock_source = dp_cs;
pipes[i].pix_clk_params.requested_pix_clk =
pipes[i].stream->public.timing.pix_clk_khz;
pipes[i].stream->timing.pix_clk_khz;
pipes[i].clock_source->funcs->program_pix_clk(
pipes[i].clock_source,
&pipes[i].pix_clk_params,
......
......@@ -32,6 +32,7 @@
#include "gpio_types.h"
#include "link_service_types.h"
#include "grph_object_ctrl_defs.h"
#include <inc/hw/opp.h>
#define MAX_SURFACES 3
#define MAX_STREAMS 6
......@@ -106,12 +107,12 @@ struct dc_cap_funcs {
struct dc_stream_funcs {
bool (*adjust_vmin_vmax)(struct dc *dc,
const struct dc_stream **stream,
struct dc_stream **stream,
int num_streams,
int vmin,
int vmax);
bool (*get_crtc_position)(struct dc *dc,
const struct dc_stream **stream,
struct dc_stream **stream,
int num_streams,
unsigned int *v_pos,
unsigned int *nom_v_pos);
......@@ -120,14 +121,14 @@ struct dc_stream_funcs {
const struct dc_stream *stream);
bool (*program_csc_matrix)(struct dc *dc,
const struct dc_stream *stream);
struct dc_stream *stream);
void (*set_static_screen_events)(struct dc *dc,
const struct dc_stream **stream,
struct dc_stream **stream,
int num_streams,
const struct dc_static_screen_events *events);
void (*set_dither_option)(const struct dc_stream *stream,
void (*set_dither_option)(struct dc_stream *stream,
enum dc_dither_option option);
};
......@@ -428,7 +429,7 @@ bool dc_commit_surfaces_to_stream(
struct dc *dc,
struct dc_surface **dc_surfaces,
uint8_t surface_count,
const struct dc_stream *stream);
struct dc_stream *stream);
bool dc_post_update_surfaces_to_stream(
struct dc *dc);
......@@ -468,6 +469,18 @@ enum surface_update_type {
/*******************************************************************************
* Stream Interfaces
******************************************************************************/
struct dc_stream_status {
int primary_otg_inst;
int surface_count;
struct dc_surface *surfaces[MAX_SURFACE_NUM];
/*
* link this stream passes through
*/
struct dc_link *link;
};
struct dc_stream {
struct dc_sink *sink;
struct dc_crtc_timing timing;
......@@ -495,6 +508,21 @@ struct dc_stream {
/* TODO: ABM info (DMCU) */
/* TODO: PSR info */
/* TODO: CEA VIC */
/* from core_stream struct */
struct dc_context *ctx;
/* used by DCP and FMT */
struct bit_depth_reduction_params bit_depth_params;
struct clamping_and_pixel_encoding_params clamping;
int phy_pix_clk;
enum signal_type signal;
struct dc_stream_status status;
/* from stream struct */
int ref_count;
};
struct dc_stream_update {
......@@ -521,7 +549,7 @@ struct dc_stream_update {
void dc_update_surfaces_and_stream(struct dc *dc,
struct dc_surface_update *surface_updates, int surface_count,
const struct dc_stream *dc_stream,
struct dc_stream *dc_stream,
struct dc_stream_update *stream_update);
/*
......@@ -554,12 +582,12 @@ bool dc_stream_get_scanoutpos(const struct dc_stream *stream,
* Structure to store surface/stream associations for validation
*/
struct dc_validation_set {
const struct dc_stream *stream;
struct dc_stream *stream;
struct dc_surface *surfaces[MAX_SURFACES];
uint8_t surface_count;
};
bool dc_validate_stream(const struct dc *dc, const struct dc_stream *stream);
bool dc_validate_stream(const struct dc *dc, struct dc_stream *stream);
/*
* This function takes a set of resources and checks that they are cofunctional.
......@@ -587,7 +615,7 @@ bool dc_validate_resources(
bool dc_validate_guaranteed(
const struct dc *dc,
const struct dc_stream *stream);
struct dc_stream *stream);
void dc_resource_validate_ctx_copy_construct(
const struct validate_context *src_ctx,
......@@ -616,7 +644,7 @@ bool dc_commit_context(struct dc *dc, struct validate_context *context);
*/
bool dc_commit_streams(
struct dc *dc,
const struct dc_stream *streams[],
struct dc_stream *streams[],
uint8_t stream_count);
/*
* Enable stereo when commit_streams is not required,
......@@ -625,7 +653,7 @@ bool dc_commit_streams(
bool dc_enable_stereo(
struct dc *dc,
struct validate_context *context,
const struct dc_stream *streams[],
struct dc_stream *streams[],
uint8_t stream_count);
/**
......@@ -633,22 +661,11 @@ bool dc_enable_stereo(
*/
struct dc_stream *dc_create_stream_for_sink(struct dc_sink *dc_sink);
void dc_stream_retain(const struct dc_stream *dc_stream);
void dc_stream_release(const struct dc_stream *dc_stream);
struct dc_stream_status {
int primary_otg_inst;
int surface_count;
struct dc_surface *surfaces[MAX_SURFACE_NUM];
/*
* link this stream passes through
*/
struct dc_link *link;
};
void dc_stream_retain(struct dc_stream *dc_stream);
void dc_stream_release(struct dc_stream *dc_stream);
struct dc_stream_status *dc_stream_get_status(
const struct dc_stream *dc_stream);
struct dc_stream *dc_stream);
enum surface_update_type dc_check_update_surfaces_for_stream(
struct dc *dc,
......@@ -915,7 +932,7 @@ bool dc_stream_set_cursor_attributes(
const struct dc_cursor_attributes *attributes);
bool dc_stream_set_cursor_position(
const struct dc_stream *stream,
struct dc_stream *stream,
const struct dc_cursor_position *position);
/* Newer interfaces */
......
......@@ -1009,7 +1009,7 @@ bool dce110_link_encoder_construct(
bool dce110_link_encoder_validate_output_with_stream(
struct link_encoder *enc,
const struct core_stream *stream)
const struct dc_stream *stream)
{
struct dce110_link_encoder *enc110 = TO_DCE110_LINK_ENC(enc);
bool is_valid;
......@@ -1021,22 +1021,22 @@ bool dce110_link_encoder_validate_output_with_stream(
enc110,
stream->sink->link->connector_signal,
stream->signal,
&stream->public.timing);
&stream->timing);
break;
case SIGNAL_TYPE_HDMI_TYPE_A:
is_valid = dce110_link_encoder_validate_hdmi_output(
enc110,
&stream->public.timing,
&stream->timing,
stream->phy_pix_clk);
break;
case SIGNAL_TYPE_DISPLAY_PORT:
case SIGNAL_TYPE_DISPLAY_PORT_MST:
is_valid = dce110_link_encoder_validate_dp_output(
enc110, &stream->public.timing);
enc110, &stream->timing);
break;
case SIGNAL_TYPE_EDP:
is_valid =
(stream->public.timing.
(stream->timing.
pixel_encoding == PIXEL_ENCODING_RGB) ? true : false;
break;
case SIGNAL_TYPE_VIRTUAL:
......
......@@ -199,7 +199,7 @@ bool dce110_link_encoder_validate_wireless_output(
bool dce110_link_encoder_validate_output_with_stream(
struct link_encoder *enc,
const struct core_stream *stream);
const struct dc_stream *stream);
/****************** HW programming ************************/
......
......@@ -660,7 +660,7 @@ static enum dc_status build_mapped_resource(
uint8_t i, j;