Commit 5602b0af authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'linux-watchdog-5.7-rc1' of git://www.linux-watchdog.org/linux-watchdog

Pull watchdog updates from Wim Van Sebroeck:

 - add TI K3 RTI watchdog

 - add stop_on_reboot parameter to control reboot policy

 - wm831x_wdt: Remove GPIO handling

 - several small fixes, improvements and clean-ups

* tag 'linux-watchdog-5.7-rc1' of git://www.linux-watchdog.org/linux-watchdog:
  watchdog: Add K3 RTI watchdog support
  dt-bindings: watchdog: Add support for TI K3 RTI watchdog
  watchdog: ziirave_wdt: change name to be more specific
  watchdog: orion: use 0 for unset heartbeat
  watchdog: npcm: remove whitespaces
  watchdog: reset last_hw_keepalive time at start
  watchdog: imx2_wdt: Drop .remove callback
  watchdog: Add stop_on_reboot parameter to control reboot policy
  watchdog: wm831x_wdt: Remove GPIO handling
  watchdog: imx7ulp: Remove unused include of init.h
  watchdog: imx_sc_wdt: Remove unused includes
  watchdog: qcom: Use irq flags from firmware
  watchdog: pm8916_wdt: Add system sleep callbacks
  watchdog: qcom-wdt: disable pretimeout on timer platform
parents 413a103c 2d63908b
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/watchdog/ti,rti-wdt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments K3 SoC Watchdog Timer
maintainers:
- Tero Kristo <t-kristo@ti.com>
description:
The TI K3 SoC watchdog timer is implemented via the RTI (Real Time
Interrupt) IP module. This timer adds a support for windowed watchdog
mode, which will signal an error if it is pinged outside the watchdog
time window, meaning either too early or too late. The error signal
generated can be routed to either interrupt a safety controller or
to directly reset the SoC.
allOf:
- $ref: "watchdog.yaml#"
properties:
compatible:
enum:
- ti,j7-rti-wdt
reg:
maxItems: 1
clocks:
maxItems: 1
power-domains:
maxItems: 1
assigned-clocks:
maxItems: 1
assigned-clocks-parents:
maxItems: 1
required:
- compatible
- reg
- clocks
- power-domains
examples:
- |
/*
* RTI WDT in main domain on J721e SoC. Assigned clocks are used to
* select the source clock for the watchdog, forcing it to tick with
* a 32kHz clock in this case.
*/
#include <dt-bindings/soc/ti,sci_pm_domain.h>
watchdog0: rti@2200000 {
compatible = "ti,rti-wdt";
reg = <0x0 0x2200000 0x0 0x100>;
clocks = <&k3_clks 252 1>;
power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>;
assigned-clocks = <&k3_clks 252 1>;
assigned-clock-parents = <&k3_clks 252 5>;
};
......@@ -584,6 +584,14 @@ config DAVINCI_WATCHDOG
NOTE: once enabled, this timer cannot be disabled.
Say N if you are unsure.
config K3_RTI_WATCHDOG
tristate "Texas Instruments K3 RTI watchdog"
depends on ARCH_K3 || COMPILE_TEST
select WATCHDOG_CORE
help
Say Y here if you want to include support for the K3 watchdog
timer (RTI module) available in the K3 generation of processors.
config ORION_WATCHDOG
tristate "Orion watchdog"
depends on ARCH_ORION5X || ARCH_DOVE || MACH_DOVE || ARCH_MVEBU || (COMPILE_TEST && !ARCH_EBSA110)
......
......@@ -57,6 +57,7 @@ obj-$(CONFIG_EP93XX_WATCHDOG) += ep93xx_wdt.o
obj-$(CONFIG_PNX4008_WATCHDOG) += pnx4008_wdt.o
obj-$(CONFIG_IOP_WATCHDOG) += iop_wdt.o
obj-$(CONFIG_DAVINCI_WATCHDOG) += davinci_wdt.o
obj-$(CONFIG_K3_RTI_WATCHDOG) += rti_wdt.o
obj-$(CONFIG_ORION_WATCHDOG) += orion_wdt.o
obj-$(CONFIG_SUNXI_WATCHDOG) += sunxi_wdt.o
obj-$(CONFIG_RN5T618_WATCHDOG) += rn5t618_wdt.o
......
......@@ -244,6 +244,11 @@ static const struct regmap_config imx2_wdt_regmap_config = {
.max_register = 0x8,
};
static void imx2_wdt_action(void *data)
{
clk_disable_unprepare(data);
}
static int __init imx2_wdt_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
......@@ -292,6 +297,10 @@ static int __init imx2_wdt_probe(struct platform_device *pdev)
if (ret)
return ret;
ret = devm_add_action_or_reset(dev, imx2_wdt_action, wdev->clk);
if (ret)
return ret;
regmap_read(wdev->regmap, IMX2_WDT_WRSR, &val);
wdog->bootstatus = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0;
......@@ -315,32 +324,7 @@ static int __init imx2_wdt_probe(struct platform_device *pdev)
*/
regmap_write(wdev->regmap, IMX2_WDT_WMCR, 0);
ret = watchdog_register_device(wdog);
if (ret)
goto disable_clk;
dev_info(dev, "timeout %d sec (nowayout=%d)\n",
wdog->timeout, nowayout);
return 0;
disable_clk:
clk_disable_unprepare(wdev->clk);
return ret;
}
static int __exit imx2_wdt_remove(struct platform_device *pdev)
{
struct watchdog_device *wdog = platform_get_drvdata(pdev);
struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
watchdog_unregister_device(wdog);
if (imx2_wdt_is_running(wdev)) {
imx2_wdt_ping(wdog);
dev_crit(&pdev->dev, "Device removed: Expect reboot!\n");
}
return 0;
return devm_watchdog_register_device(dev, wdog);
}
static void imx2_wdt_shutdown(struct platform_device *pdev)
......@@ -417,7 +401,6 @@ static const struct of_device_id imx2_wdt_dt_ids[] = {
MODULE_DEVICE_TABLE(of, imx2_wdt_dt_ids);
static struct platform_driver imx2_wdt_driver = {
.remove = __exit_p(imx2_wdt_remove),
.shutdown = imx2_wdt_shutdown,
.driver = {
.name = DRIVER_NAME,
......
......@@ -4,7 +4,6 @@
*/
#include <linux/clk.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
......
......@@ -6,13 +6,11 @@
#include <linux/arm-smccc.h>
#include <linux/firmware/imx/sci.h>
#include <linux/io.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/reboot.h>
#include <linux/watchdog.h>
#define DEFAULT_TIMEOUT 60
......
......@@ -103,30 +103,29 @@ static int npcm_wdt_stop(struct watchdog_device *wdd)
return 0;
}
static int npcm_wdt_set_timeout(struct watchdog_device *wdd,
unsigned int timeout)
{
if (timeout < 2)
wdd->timeout = 1;
else if (timeout < 3)
wdd->timeout = 2;
wdd->timeout = 2;
else if (timeout < 6)
wdd->timeout = 5;
wdd->timeout = 5;
else if (timeout < 11)
wdd->timeout = 10;
wdd->timeout = 10;
else if (timeout < 22)
wdd->timeout = 21;
wdd->timeout = 21;
else if (timeout < 44)
wdd->timeout = 43;
wdd->timeout = 43;
else if (timeout < 87)
wdd->timeout = 86;
wdd->timeout = 86;
else if (timeout < 173)
wdd->timeout = 172;
wdd->timeout = 172;
else if (timeout < 688)
wdd->timeout = 687;
wdd->timeout = 687;
else
wdd->timeout = 2750;
wdd->timeout = 2750;
if (watchdog_active(wdd))
npcm_wdt_start(wdd);
......
......@@ -52,7 +52,7 @@
#define WDT_A370_RATIO (1 << WDT_A370_RATIO_SHIFT)
static bool nowayout = WATCHDOG_NOWAYOUT;
static int heartbeat = -1; /* module parameter (seconds) */
static int heartbeat; /* module parameter (seconds) */
struct orion_watchdog;
......
......@@ -192,6 +192,7 @@ static int pm8916_wdt_probe(struct platform_device *pdev)
wdt->wdev.timeout = PM8916_WDT_DEFAULT_TIMEOUT;
wdt->wdev.pretimeout = 0;
watchdog_set_drvdata(&wdt->wdev, wdt);
platform_set_drvdata(pdev, wdt);
watchdog_init_timeout(&wdt->wdev, 0, dev);
pm8916_wdt_configure_timers(&wdt->wdev);
......@@ -199,6 +200,29 @@ static int pm8916_wdt_probe(struct platform_device *pdev)
return devm_watchdog_register_device(dev, &wdt->wdev);
}
static int __maybe_unused pm8916_wdt_suspend(struct device *dev)
{
struct pm8916_wdt *wdt = dev_get_drvdata(dev);
if (watchdog_active(&wdt->wdev))
return pm8916_wdt_stop(&wdt->wdev);
return 0;
}
static int __maybe_unused pm8916_wdt_resume(struct device *dev)
{
struct pm8916_wdt *wdt = dev_get_drvdata(dev);
if (watchdog_active(&wdt->wdev))
return pm8916_wdt_start(&wdt->wdev);
return 0;
}
static SIMPLE_DEV_PM_OPS(pm8916_wdt_pm_ops, pm8916_wdt_suspend,
pm8916_wdt_resume);
static const struct of_device_id pm8916_wdt_id_table[] = {
{ .compatible = "qcom,pm8916-wdt" },
{ }
......@@ -210,6 +234,7 @@ static struct platform_driver pm8916_wdt_driver = {
.driver = {
.name = "pm8916-wdt",
.of_match_table = of_match_ptr(pm8916_wdt_id_table),
.pm = &pm8916_wdt_pm_ops,
},
};
module_platform_driver(pm8916_wdt_driver);
......
......@@ -40,6 +40,11 @@ static const u32 reg_offset_data_kpss[] = {
[WDT_BITE_TIME] = 0x14,
};
struct qcom_wdt_match_data {
const u32 *offset;
bool pretimeout;
};
struct qcom_wdt {
struct watchdog_device wdd;
unsigned long rate;
......@@ -179,19 +184,29 @@ static void qcom_clk_disable_unprepare(void *data)
clk_disable_unprepare(data);
}
static const struct qcom_wdt_match_data match_data_apcs_tmr = {
.offset = reg_offset_data_apcs_tmr,
.pretimeout = false,
};
static const struct qcom_wdt_match_data match_data_kpss = {
.offset = reg_offset_data_kpss,
.pretimeout = true,
};
static int qcom_wdt_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct qcom_wdt *wdt;
struct resource *res;
struct device_node *np = dev->of_node;
const u32 *regs;
const struct qcom_wdt_match_data *data;
u32 percpu_offset;
int irq, ret;
struct clk *clk;
regs = of_device_get_match_data(dev);
if (!regs) {
data = of_device_get_match_data(dev);
if (!data) {
dev_err(dev, "Unsupported QCOM WDT module\n");
return -ENODEV;
}
......@@ -247,9 +262,8 @@ static int qcom_wdt_probe(struct platform_device *pdev)
/* check if there is pretimeout support */
irq = platform_get_irq_optional(pdev, 0);
if (irq > 0) {
ret = devm_request_irq(dev, irq, qcom_wdt_isr,
IRQF_TRIGGER_RISING,
if (data->pretimeout && irq > 0) {
ret = devm_request_irq(dev, irq, qcom_wdt_isr, 0,
"wdt_bark", &wdt->wdd);
if (ret)
return ret;
......@@ -267,7 +281,7 @@ static int qcom_wdt_probe(struct platform_device *pdev)
wdt->wdd.min_timeout = 1;
wdt->wdd.max_timeout = 0x10000000U / wdt->rate;
wdt->wdd.parent = dev;
wdt->layout = regs;
wdt->layout = data->offset;
if (readl(wdt_addr(wdt, WDT_STS)) & 1)
wdt->wdd.bootstatus = WDIOF_CARDRESET;
......@@ -311,9 +325,9 @@ static int __maybe_unused qcom_wdt_resume(struct device *dev)
static SIMPLE_DEV_PM_OPS(qcom_wdt_pm_ops, qcom_wdt_suspend, qcom_wdt_resume);
static const struct of_device_id qcom_wdt_of_table[] = {
{ .compatible = "qcom,kpss-timer", .data = reg_offset_data_apcs_tmr },
{ .compatible = "qcom,scss-timer", .data = reg_offset_data_apcs_tmr },
{ .compatible = "qcom,kpss-wdt", .data = reg_offset_data_kpss },
{ .compatible = "qcom,kpss-timer", .data = &match_data_apcs_tmr },
{ .compatible = "qcom,scss-timer", .data = &match_data_apcs_tmr },
{ .compatible = "qcom,kpss-wdt", .data = &match_data_kpss },
{ },
};
MODULE_DEVICE_TABLE(of, qcom_wdt_of_table);
......
// SPDX-License-Identifier: GPL-2.0
/*
* Watchdog driver for the K3 RTI module
*
* (c) Copyright 2019-2020 Texas Instruments Inc.
* All rights reserved.
*/
#include <linux/clk.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/types.h>
#include <linux/watchdog.h>
#define DEFAULT_HEARTBEAT 60
/* Max heartbeat is calculated at 32kHz source clock */
#define MAX_HEARTBEAT 1000
/* Timer register set definition */
#define RTIDWDCTRL 0x90
#define RTIDWDPRLD 0x94
#define RTIWDSTATUS 0x98
#define RTIWDKEY 0x9c
#define RTIDWDCNTR 0xa0
#define RTIWWDRXCTRL 0xa4
#define RTIWWDSIZECTRL 0xa8
#define RTIWWDRX_NMI 0xa
#define RTIWWDSIZE_50P 0x50
#define WDENABLE_KEY 0xa98559da
#define WDKEY_SEQ0 0xe51a
#define WDKEY_SEQ1 0xa35c
#define WDT_PRELOAD_SHIFT 13
#define WDT_PRELOAD_MAX 0xfff
#define DWDST BIT(1)
static int heartbeat;
/*
* struct to hold data for each WDT device
* @base - base io address of WD device
* @freq - source clock frequency of WDT
* @wdd - hold watchdog device as is in WDT core
*/
struct rti_wdt_device {
void __iomem *base;
unsigned long freq;
struct watchdog_device wdd;
};
static int rti_wdt_start(struct watchdog_device *wdd)
{
u32 timer_margin;
struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
/* set timeout period */
timer_margin = (u64)wdd->timeout * wdt->freq;
timer_margin >>= WDT_PRELOAD_SHIFT;
if (timer_margin > WDT_PRELOAD_MAX)
timer_margin = WDT_PRELOAD_MAX;
writel_relaxed(timer_margin, wdt->base + RTIDWDPRLD);
/*
* RTI only supports a windowed mode, where the watchdog can only
* be petted during the open window; not too early or not too late.
* The HW configuration options only allow for the open window size
* to be 50% or less than that; we obviouly want to configure the open
* window as large as possible so we select the 50% option. To avoid
* any glitches, we accommodate 5% safety margin also, so we setup
* the min_hw_hearbeat at 55% of the timeout period.
*/
wdd->min_hw_heartbeat_ms = 11 * wdd->timeout * 1000 / 20;
/* Generate NMI when wdt expires */
writel_relaxed(RTIWWDRX_NMI, wdt->base + RTIWWDRXCTRL);
/* Open window size 50%; this is the largest window size available */
writel_relaxed(RTIWWDSIZE_50P, wdt->base + RTIWWDSIZECTRL);
readl_relaxed(wdt->base + RTIWWDSIZECTRL);
/* enable watchdog */
writel_relaxed(WDENABLE_KEY, wdt->base + RTIDWDCTRL);
return 0;
}
static int rti_wdt_ping(struct watchdog_device *wdd)
{
struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
/* put watchdog in service state */
writel_relaxed(WDKEY_SEQ0, wdt->base + RTIWDKEY);
/* put watchdog in active state */
writel_relaxed(WDKEY_SEQ1, wdt->base + RTIWDKEY);
return 0;
}
static unsigned int rti_wdt_get_timeleft(struct watchdog_device *wdd)
{
u64 timer_counter;
u32 val;
struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
/* if timeout has occurred then return 0 */
val = readl_relaxed(wdt->base + RTIWDSTATUS);
if (val & DWDST)
return 0;
timer_counter = readl_relaxed(wdt->base + RTIDWDCNTR);
do_div(timer_counter, wdt->freq);
return timer_counter;
}
static const struct watchdog_info rti_wdt_info = {
.options = WDIOF_KEEPALIVEPING,
.identity = "K3 RTI Watchdog",
};
static const struct watchdog_ops rti_wdt_ops = {
.owner = THIS_MODULE,
.start = rti_wdt_start,
.ping = rti_wdt_ping,
.get_timeleft = rti_wdt_get_timeleft,
};
static int rti_wdt_probe(struct platform_device *pdev)
{
int ret = 0;
struct device *dev = &pdev->dev;
struct resource *wdt_mem;
struct watchdog_device *wdd;
struct rti_wdt_device *wdt;
struct clk *clk;
wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
if (!wdt)
return -ENOMEM;
clk = clk_get(dev, NULL);
if (IS_ERR(clk)) {
if (PTR_ERR(clk) != -EPROBE_DEFER)
dev_err(dev, "failed to get clock\n");
return PTR_ERR(clk);
}
wdt->freq = clk_get_rate(clk);
clk_put(clk);
if (!wdt->freq) {
dev_err(dev, "Failed to get fck rate.\n");
return -EINVAL;
}
pm_runtime_enable(dev);
ret = pm_runtime_get_sync(dev);
if (ret) {
if (ret != -EPROBE_DEFER)
dev_err(&pdev->dev, "runtime pm failed\n");
return ret;
}
platform_set_drvdata(pdev, wdt);
wdd = &wdt->wdd;
wdd->info = &rti_wdt_info;
wdd->ops = &rti_wdt_ops;
wdd->min_timeout = 1;
wdd->max_hw_heartbeat_ms = (WDT_PRELOAD_MAX << WDT_PRELOAD_SHIFT) /
wdt->freq * 1000;
wdd->timeout = DEFAULT_HEARTBEAT;
wdd->parent = dev;
watchdog_init_timeout(wdd, heartbeat, dev);
watchdog_set_drvdata(wdd, wdt);
watchdog_set_nowayout(wdd, 1);
watchdog_set_restart_priority(wdd, 128);
wdt_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
wdt->base = devm_ioremap_resource(dev, wdt_mem);
if (IS_ERR(wdt->base)) {
ret = PTR_ERR(wdt->base);
goto err_iomap;
}
ret = watchdog_register_device(wdd);
if (ret) {
dev_err(dev, "cannot register watchdog device\n");
goto err_iomap;
}
return 0;
err_iomap:
pm_runtime_put_sync(&pdev->dev);
return ret;
}
static int rti_wdt_remove(struct platform_device *pdev)
{
struct rti_wdt_device *wdt = platform_get_drvdata(pdev);
watchdog_unregister_device(&wdt->wdd);
pm_runtime_put(&pdev->dev);
return 0;
}
static const struct of_device_id rti_wdt_of_match[] = {
{ .compatible = "ti,j7-rti-wdt", },
{},
};
MODULE_DEVICE_TABLE(of, rti_wdt_of_match);
static struct platform_driver rti_wdt_driver = {
.driver = {
.name = "rti-wdt",
.of_match_table = rti_wdt_of_match,
},
.probe = rti_wdt_probe,
.remove = rti_wdt_remove,
};
module_platform_driver(rti_wdt_driver);
MODULE_AUTHOR("Tero Kristo <t-kristo@ti.com>");
MODULE_DESCRIPTION("K3 RTI Watchdog Driver");
module_param(heartbeat, int, 0);
MODULE_PARM_DESC(heartbeat,
"Watchdog heartbeat period in seconds from 1 to "
__MODULE_STRING(MAX_HEARTBEAT) ", default "
__MODULE_STRING(DEFAULT_HEARTBEAT));
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:rti-wdt");
......@@ -39,6 +39,10 @@
static DEFINE_IDA(watchdog_ida);
static int stop_on_reboot = -1;
module_param(stop_on_reboot, int, 0444);
MODULE_PARM_DESC(stop_on_reboot, "Stop watchdogs on reboot (0=keep watching, 1=stop)");
/*
* Deferred Registration infrastructure.
*
......@@ -254,6 +258,14 @@ static int __watchdog_register_device(struct watchdog_device *wdd)
}
}
/* Module parameter to force watchdog policy on reboot. */
if (stop_on_reboot != -1) {
if (stop_on_reboot)
set_bit(WDOG_STOP_ON_REBOOT, &wdd->status);
else
clear_bit(WDOG_STOP_ON_REBOOT, &wdd->status);
}
if (test_bit(WDOG_STOP_ON_REBOOT, &wdd->status)) {
wdd->reboot_nb.notifier_call = watchdog_reboot_notifier;
......
......@@ -282,6 +282,7 @@ static int watchdog_start(struct watchdog_device *wdd)
if (err == 0) {
set_bit(WDOG_ACTIVE, &wdd->status);
wd_data->last_keepalive = started_at;
wd_data->last_hw_keepalive = started_at;
watchdog_update_worker(wdd);
}
......
......@@ -13,7 +13,6 @@
#include <linux/platform_device.h>
#include <linux/watchdog.h>
#include <linux/uaccess.h>
#include <linux/gpio.h>
#include <linux/mfd/wm831x/core.h>
#include <linux/mfd/wm831x/pdata.h>
......@@ -29,7 +28,6 @@ struct wm831x_wdt_drvdata {
struct watchdog_device wdt;
struct wm831x *wm831x;
struct mutex lock;
int update_gpio;
int update_state;
};
......@@ -103,14 +101,6 @@ static int wm831x_wdt_ping(struct watchdog_device *wdt_dev)
mutex_lock(&driver_data->lock);
if (driver_data->update_gpio) {
gpio_set_value_cansleep(driver_data->update_gpio,
driver_data->update_state);
driver_data->update_state = !driver_data->update_state;
ret = 0;
goto out;
}
reg = wm831x_reg_read(wm831x, WM831X_WATCHDOG);
if (!(reg & WM831X_WDOG_RST_SRC)) {
......@@ -239,23 +229,6 @@ static int wm831x_wdt_probe(struct platform_device *pdev)
reg |= pdata->secondary << WM831X_WDOG_SECACT_SHIFT;
reg |= pdata->software << WM831X_WDOG_RST_SRC_SHIFT;
if (pdata->update_gpio) {
ret = devm_gpio_request_one(dev, pdata->update_gpio,
GPIOF_OUT_INIT_LOW,
"Watchdog update");
if (ret < 0) {
dev_err(wm831x->dev,
"Failed to request update GPIO: %d\n",
ret);
return ret;
}
driver_data->update_gpio = pdata->update_gpio;
/* Make sure the watchdog takes hardware updates */
reg |= WM831X_WDOG_RST_SRC;
}