Commit 845e405e authored by Grygorii Strashko's avatar Grygorii Strashko Committed by Linus Walleij

pinctrl: cherryview: fix issues caused by dynamic gpio irqs mapping

New GPIO IRQs are allocated and mapped dynamically by default when
GPIO IRQ infrastructure is used by cherryview-pinctrl driver.
This causes issues on some Intel platforms [1][2] with broken BIOS which
hardcodes Linux IRQ numbers in their ACPI tables.

On such platforms cherryview-pinctrl driver should allocate and map all
GPIO IRQs at probe time.
Side effect - "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n"
can be seen at boot log.

NOTE. It still may fail if boot sequence will changed and some interrupt
controller will be probed before cherryview-pinctrl which will shift Linux IRQ
numbering (expected with CONFIG_SPARCE_IRQ enabled).

Cc: Andy Shevchenko <>
Cc: Chris Gorman <>
Cc: Mika Westerberg <>
Cc: Heikki Krogerus <>
Signed-off-by: default avatarGrygorii Strashko <>
Reported-by: default avatarChris Gorman <>
Reported-by: default avatarMika Westerberg <>
Tested-by: default avatarChris Gorman <>
Acked-by: default avatarMika Westerberg <>
Signed-off-by: default avatarLinus Walleij <>
parent 83b31c2a
......@@ -1577,6 +1577,7 @@ static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq)
struct gpio_chip *chip = &pctrl->chip;
bool need_valid_mask = !dmi_check_system(chv_no_valid_mask);
int ret, i, offset;
int irq_base;
*chip = chv_gpio_chip;
......@@ -1622,7 +1623,18 @@ static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq)
/* Clear all interrupts */
chv_writel(0xffff, pctrl->regs + CHV_INTSTAT);
ret = gpiochip_irqchip_add(chip, &chv_gpio_irqchip, 0,
if (!need_valid_mask) {
irq_base = devm_irq_alloc_descs(pctrl->dev, -1, 0,
chip->ngpio, NUMA_NO_NODE);
if (irq_base < 0) {
dev_err(pctrl->dev, "Failed to allocate IRQ numbers\n");
return irq_base;
} else {
irq_base = 0;
ret = gpiochip_irqchip_add(chip, &chv_gpio_irqchip, irq_base,
handle_bad_irq, IRQ_TYPE_NONE);
if (ret) {
dev_err(pctrl->dev, "failed to add IRQ chip\n");
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