1. 13 Jun, 2017 1 commit
  2. 26 Apr, 2017 2 commits
  3. 23 Apr, 2017 1 commit
    • Ingo Molnar's avatar
      Revert "x86/mm/gup: Switch GUP to the generic get_user_page_fast() implementation" · 6dd29b3d
      Ingo Molnar authored
      This reverts commit 2947ba05.
      
      Dan Williams reported dax-pmem kernel warnings with the following signature:
      
         WARNING: CPU: 8 PID: 245 at lib/percpu-refcount.c:155 percpu_ref_switch_to_atomic_rcu+0x1f5/0x200
         percpu ref (dax_pmem_percpu_release [dax_pmem]) <= 0 (0) after switching to atomic
      
      ... and bisected it to this commit, which suggests possible memory corruption
      caused by the x86 fast-GUP conversion.
      
      He also pointed out:
      
       "
        This is similar to the backtrace when we were not properly handling
        pud faults and was fixed with this commit: 220ced16
      
       "mm: fix
        get_user_pages() vs device-dax pud mappings"
      
        I've found some missing _devmap checks in the generic
        get_user_pages_fast() path, but this does not fix the regression
        [...]
       "
      
      So given that there are known bugs, and a pretty robust looking bisection
      points to this commit suggesting that are unknown bugs in the conversion
      as well, revert it for the time being - we'll re-try in v4.13.
      Reported-by: default avatarDan Williams <dan.j.williams@intel.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Michal Hocko <mhocko@suse.cz>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Rik van Riel <riel@redhat.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: aneesh.kumar@linux.vnet.ibm.com
      Cc: dann.frazier@canonical.com
      Cc: dave.hansen@intel.com
      Cc: steve.capper@linaro.org
      Cc: linux-kernel@vger.kernel.org
      Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
      6dd29b3d
  4. 30 Mar, 2017 1 commit
    • Ard Biesheuvel's avatar
      ARM: 8663/1: wire up HWCAP/HWCAP2 feature bits to the CPU modalias · ea2d9a96
      Ard Biesheuvel authored
      
      
      Wire up the generic support for exposing CPU feature bits via the
      modalias in /sys/device/system/cpu. This allows udev to automatically
      load modules for things like crypto algorithms that are implemented
      using optional instructions.
      
      Since it is non-trivial to transparantly support both HWCAP and HWCAP2
      capabilities in the cpu_feature() macro (which allows a module's hwcap
      dependency and init routine to be declared using a single invocation of
      module_cpu_feature_match()), support only HWCAP2 for now, which covers
      the capabilities that are most likely to be useful in this manner.
      Module dependencies on HWCAP will need to be declared explicitly via a
      MODULE_DEVICE_TABLE(cpu, ...) declaration.
      Signed-off-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      ea2d9a96
  5. 28 Mar, 2017 1 commit
  6. 24 Mar, 2017 1 commit
  7. 18 Mar, 2017 1 commit
  8. 12 Mar, 2017 6 commits
    • Linus Walleij's avatar
      ARM: gemini: convert to ARMv4 multiplatform · 6dbb708a
      Linus Walleij authored
      
      
      This converts the Gemini platform to ARMv4 multiplatform, deleting
      the local <mach/*> include directory, moving an idiomatic local
      idling function into the .machine_init() call and getting rid of
      the Makefile.boot finally.
      
      Cc: Janos Laube <janos.dev@gmail.com>
      Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
      Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      6dbb708a
    • Linus Walleij's avatar
      ARM: gemini: select ARM_PATCH_PHYS_VIRT and AUTO_ZRELADDR · 8e39061e
      Linus Walleij authored
      
      
      This platform survives physical to virtual patching
      without any hickups, and can use AUTO_ZRELADDR.
      We still need to keep Makefile.boot but it is now empty.
      
      Cc: Janos Laube <janos.dev@gmail.com>
      Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
      Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      8e39061e
    • Linus Walleij's avatar
      ARM: gemini: switch to sparse IRQs · 46abf938
      Linus Walleij authored
      
      
      There is no boardfiles or anything else using the fixed IRQs
      anymore, switch the platform to use sparse IRQs and delete
      the <mach/irqs.h> header.
      
      Cc: Janos Laube <janos.dev@gmail.com>
      Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
      Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      46abf938
    • Linus Walleij's avatar
      ARM: gemini: delete all boardfiles · ee149d66
      Linus Walleij authored
      
      
      Delete the Gemini boardfiles: we have corresponding, fully-featured
      device trees for all these boards. Delete the referenced include
      files. Delete the local config symbols, especially one for
      "swapped memory", as all supported boards have swapped memory, and
      would a new board be supported this is likely not the right way
      to achieve it anyways. Only the Kconfig options in the central
      arch/arm/Kconfig remains.
      
      Cc: Janos Laube <janos.dev@gmail.com>
      Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
      Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      ee149d66
    • Linus Walleij's avatar
      ARM: gemini: DT for the Cortina Gemini SoC platforms · 41d9830c
      Linus Walleij authored
      
      
      This adds initial and compulsory device tree support to the
      Gemini ARMv4 platform.
      
      We are selecting a bunch of "absolute minimals" for getting a working
      system up with just device tree:
      
      - We select USE_OF for natural reasons or nothing works.
      
      - We select CLKSRC_OF and GEMINI_TIMER so we get timekeeping from
        the clocksource.
      
      - We select GPIO_GEMINI because these are used as irqchips, and
        for a generic driver it is not reasonable for those to have to
        select every possible irqchip in the world to work, the platform
        should simply provide the available irqchips.
      
      - We select a UART that can be exprected to work with
        SERIAL_OF_PLATFORM which is the name for an 8250 OF-probed
        serial port.
      
      - We select the syscon-based reset controller: it's not fun when
        "reboot" doesn't work because of Kconfig, so we just select
        POWER_RESET and POWER_RESET_SYSCON.
      
      - We perhaps a bit controversiallt select ARM_APPENDED_DTB, because
        this platform is using the ancient RedBoot, and can *NOT* be
        expected to upgrade its bootloaders. Appended device tree is
        simply how these devices have to work with device tree.
      
      Cc: Janos Laube <janos.dev@gmail.com>
      Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
      Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      41d9830c
    • Linus Walleij's avatar
      ARM: gemini: convert to MULTI_IRQ_HANDLER · c12ddfe1
      Linus Walleij authored
      
      
      In order to enable device tree boot on this machine we must first
      convert it to runtime-manage its irq handler, so do this.
      
      Cc: Janos Laube <janos.dev@gmail.com>
      Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com>
      Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      c12ddfe1
  9. 28 Feb, 2017 1 commit
  10. 21 Feb, 2017 1 commit
    • Daniel Borkmann's avatar
      arch: add ARCH_HAS_SET_MEMORY config · d2852a22
      Daniel Borkmann authored
      
      
      Currently, there's no good way to test for the presence of
      set_memory_ro/rw/x/nx() helpers implemented by archs such as
      x86, arm, arm64 and s390.
      
      There's DEBUG_SET_MODULE_RONX and DEBUG_RODATA, however both
      don't really reflect that: set_memory_*() are also available
      even when DEBUG_SET_MODULE_RONX is turned off, and DEBUG_RODATA
      is set by parisc, but doesn't implement above functions. Thus,
      add ARCH_HAS_SET_MEMORY that is selected by mentioned archs,
      where generic code can test against this.
      
      This also allows later on to move DEBUG_SET_MODULE_RONX out of
      the arch specific Kconfig to define it only once depending on
      ARCH_HAS_SET_MEMORY.
      Suggested-by: default avatarLaura Abbott <labbott@redhat.com>
      Signed-off-by: default avatarDaniel Borkmann <daniel@iogearbox.net>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      d2852a22
  11. 07 Feb, 2017 1 commit
  12. 07 Dec, 2016 1 commit
    • Krzysztof Kozlowski's avatar
      ARM: Drop fixed 200 Hz timer requirement from Samsung platforms · da6b21e9
      Krzysztof Kozlowski authored
      All Samsung platforms, including the Exynos, are selecting HZ_FIXED with
      200 Hz.  Unfortunately in case of multiplatform image this affects also
      other platforms when Exynos is enabled.
      
      This looks like an very old legacy code, dating back to initial
      upstreaming of S3C24xx.  Probably it was required for s3c24xx timer
      driver, which was removed in commit ad38bdd1
      
       ("ARM: SAMSUNG: Remove
      unused plat-samsung/time.c").
      
      Since then, this fixed 200 Hz spread everywhere, including out-of-tree
      Samsung kernels (SoC vendor's and Tizen's).  I believe this choice
      was rather an effect of coincidence instead of conscious choice.
      
      On S3C24xx, the PWM counter is only 16 bit wide, and with the
      typical 12MHz input clock that overflows every 5.5ms.  This works
      with HZ=200 or higher but not with HZ=100 which needs a 10ms
      interval between ticks.  On Later chips (S3C64xx, S5P and EXYNOS),
      the counter is 32 bits and does not have this problem.
      
      The new samsung_pwm_timer driver solves the problem by scaling the input
      clock by a factor of 50 on S3C24xx, which makes it less accurate but
      allows HZ=100 as well as CONFIG_NO_HZ with fewer wakeups.
      
      Few perf mem and sched tests on Odroid XU3 board (Exynos5422, 4x Cortex
      A7, 4x Cortex A15) show no regressions when switching from 200 Hz to
      other values.
      Reported-by: default avatarLee Jones <lee.jones@linaro.org>
      [Dropping of 200_HZ from S3C/S5P was suggested by Arnd]
      Reported-by: default avatarArnd Bergmann <arnd@arndb.de>
      Cc: Kukjin Kim <kgene@kernel.org>
      Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
      [Tested on Exynos5800]
      Tested-by: default avatarJavier Martinez Canillas <javier@osg.samsung.com>
      Acked-by: default avatarKukjin Kim <kgene@kernel.org>
      [Tested on S3C2440]
      Tested-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
      Acked-by: default avatarLee Jones <lee.jones@linaro.org>
      da6b21e9
  13. 29 Nov, 2016 1 commit
  14. 15 Nov, 2016 1 commit
  15. 08 Oct, 2016 1 commit
    • Vineet Gupta's avatar
      atomic64: no need for CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE · 51a02124
      Vineet Gupta authored
      This came to light when implementing native 64-bit atomics for ARCv2.
      
      The atomic64 self-test code uses CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
      to check whether atomic64_dec_if_positive() is available.  It seems it
      was needed when not every arch defined it.  However as of current code
      the Kconfig option seems needless
      
       - for CONFIG_GENERIC_ATOMIC64 it is auto-enabled in lib/Kconfig and a
         generic definition of API is present lib/atomic64.c
       - arches with native 64-bit atomics select it in arch/*/Kconfig and
         define the API in their headers
      
      So I see no point in keeping the Kconfig option
      
      Compile tested for:
       - blackfin (CONFIG_GENERIC_ATOMIC64)
       - x86 (!CONFIG_GENERIC_ATOMIC64)
       - ia64
      
      Link: http://lkml.kernel.org/r/1473703083-8625-3-git-send-email-vgupta@synopsys.com
      
      Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
      Cc: Richard Henderson <rth@twiddle.net>
      Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
      Cc: Matt Turner <mattst88@gmail.com>
      Cc: Russell King <linux@armlinux.org.uk>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
      Cc: Helge Deller <deller@gmx.de>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Michael Ellerman <mpe@ellerman.id.au>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Chris Metcalf <cmetcalf@mellanox.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: Vineet Gupta <vgupta@synopsys.com>
      Cc: Zhaoxiu Zeng <zhaoxiu.zeng@gmail.com>
      Cc: Linus Walleij <linus.walleij@linaro.org>
      Cc: Alexander Potapenko <glider@google.com>
      Cc: Andrey Ryabinin <aryabinin@virtuozzo.com>
      Cc: Herbert Xu <herbert@gondor.apana.org.au>
      Cc: Ming Lin <ming.l@ssi.samsung.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@suse.de>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Boqun Feng <boqun.feng@gmail.com>
      Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      51a02124
  16. 23 Sep, 2016 1 commit
  17. 21 Sep, 2016 2 commits
  18. 15 Aug, 2016 1 commit
    • Linus Walleij's avatar
      ARM: realview: imply device tree boot · 8f2c0062
      Linus Walleij authored
      
      
      This reduces the Kconfig for the RealView by assuming we are
      always booting from the device tree, and removing all the uses
      of CONFIG_REALVIEW_DT and replacing with CONFIG_ARCH_REALVIEW.
      
      Further:
      
      - Drop REALVIEW_HIGH_PHYS_OFFSET: we don't use this with device
        tree.
      
      - Drop the REALVIEW_EB_ARM11MP_REVB option: we now handle this
        by simply using another device tree.
      
      - Drop the PB1176 secure flash option: this is defined in the
        PB1176 device tree but marked as "disabled", so users who
        want to use it can simply enable it in the device tree and
        go hacking around.
      
      Cc: Brian Norris <computersforpeace@gmail.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      8f2c0062
  19. 26 Jul, 2016 1 commit
  20. 21 Jul, 2016 1 commit
  21. 14 Jul, 2016 3 commits
    • Doug Anderson's avatar
      ARM: 8560/1: errata: Workaround errata A12 825619 / A17 852421 · 9f6f9354
      Doug Anderson authored
      
      
      The workaround for both errata is to set bit 24 in the diagnostic
      register.  There are no known end-user bugs solved by fixing this
      errata, but the fix is trivial and it seems sane to apply it.
      
      The arguments for why this needs to be in the kernel are similar to the
      arugments made in the patch "Workaround errata A12 818325/852422 A17
      852423".
      Signed-off-by: default avatarDouglas Anderson <dianders@chromium.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      9f6f9354
    • Doug Anderson's avatar
      ARM: 8559/1: errata: Workaround erratum A12 821420 · 416bcf21
      Doug Anderson authored
      
      
      This erratum has a very simple workaround (set a bit in a register), so
      let's apply it.  Apparently the workaround's downside is a very slight
      power impact.
      
      Note that applying this errata fixes deadlocks that are easy to
      reproduce with real world applications.
      
      The arguments for why this needs to be in the kernel are similar to the
      arugments made in the patch "Workaround errata A12 818325/852422 A17
      852423".
      Signed-off-by: default avatarDouglas Anderson <dianders@chromium.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      416bcf21
    • Doug Anderson's avatar
      ARM: 8558/1: errata: Workaround errata A12 818325/852422 A17 852423 · 62c0f4a5
      Doug Anderson authored
      There are several similar errata on Cortex A12 and A17 that all have the same workaround: setting bit[12] of the Feature Register.
      Technically the list of errata are:
      
      - A12 818325: Execution of an UNPREDICTABLE STR or STM instruction
        might deadlock.  Fixed in r0p1.
      - A12 852422: Execution of a sequence of instructions might lead to
        either a data corruption or a CPU deadlock.  Not fixed in any A12s
        yet.
      - A17 852423: Execution of a sequence of instructions might lead to
        either a data corruption or a CPU deadlock.  Not fixed in any A17s
        yet.
      
      Since A12 got renamed to A17 it seems likely that there won't be any
      future Cortex-A12 cores, so we'll enable for all Cortex-A12.
      
      For Cortex-A17 I believe that all known revisions are affected and that all knows revisions means <= r1p2.  Presumably if a new A17 was
      released it would have this problem fixed.
      
      Note that in <https://patchwork.kernel.org/patch/4735341/
      
      > folks
      previously expressed opposition to this change because:
      A) It was thought to only apply to r0p0 and there were no known r0p0
         boards supported in mainline.
      B) It was argued that such a workaround beloned in firmware.
      
      Now that this same fix solves other errata on real boards (like
      rk3288) point A) is addressed.
      
      Point B) is impossible to address on boards like rk3288.  On rk3288
      the firmware doesn't stay resident in RAM and isn't involved at all in
      the suspend/resume process nor in the SMP bringup process.  That means
      that the most the firmware could do would be to set the bit on "core
      0" and this bit would be lost at suspend/resume time.  It is true that
      we could write a "generic" solution that saved the boot-time "core 0"
      value of this register and applied it at SMP bringup / resume time.
      However, since this register (described as the "Feature Register" in
      errata) appears to be undocumented (as far as I can tell) and is only
      modified for these errata, that "generic" solution seems questionably
      cleaner.  The generic solution also won't fix existing users that
      haven't happened to do a FW update.
      
      Note that in ARM64 presumably PSCI will be universal and fixes like
      this will end up in ATF.  Hopefully we are nearing the end of this
      style of errata workaround.
      Signed-off-by: default avatarDouglas Anderson <dianders@chromium.org>
      Signed-off-by: default avatarHuang Tao <huangtao@rock-chips.com>
      Signed-off-by: default avatarKever Yang <kever.yang@rock-chips.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      62c0f4a5
  22. 06 Jul, 2016 1 commit
  23. 28 Jun, 2016 1 commit
  24. 15 Jun, 2016 1 commit
    • Arnd Bergmann's avatar
      PCI/MSI: irqchip: Fix PCI_MSI dependencies · 3ee80364
      Arnd Bergmann authored
      
      
      The PCI_MSI symbol is used inconsistently throughout the tree, with some
      drivers using 'select' and others using 'depends on', or using conditional
      selects.  This keeps causing problems; the latest one is a result of
      ARCH_ALPINE using a 'select' statement to enable its platform-specific MSI
      driver without enabling MSI:
      
        warning: (ARCH_ALPINE) selects ALPINE_MSI which has unmet direct dependencies (PCI && PCI_MSI)
        drivers/irqchip/irq-alpine-msi.c:104:15: error: variable 'alpine_msix_domain_info' has initializer but incomplete type
         static struct msi_domain_info alpine_msix_domain_info = {
      		 ^~~~~~~~~~~~~~~
        drivers/irqchip/irq-alpine-msi.c:105:2: error: unknown field 'flags' specified in initializer
          .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
          ^
        drivers/irqchip/irq-alpine-msi.c:105:11: error: 'MSI_FLAG_USE_DEF_DOM_OPS' undeclared here (not in a function)
          .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
      	     ^~~~~~~~~~~~~~~~~~~~~~~~
      
      There is little reason to enable PCI support for a platform that uses MSI
      but then leave MSI disabled at compile time.
      
      Select PCI_MSI from irqchips that implement MSI, and make PCI host bridges
      that use MSI on ARM depend on PCI_MSI_IRQ_DOMAIN.
      
      For all three architectures that support PCI_MSI_IRQ_DOMAIN (ARM, ARM64,
      X86), enable it by default whenever MSI is enabled.
      
      [bhelgaas: changelog, omit crypto config change]
      Suggested-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Acked-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
      3ee80364
  25. 07 Jun, 2016 1 commit
    • Emese Revfy's avatar
      GCC plugin infrastructure · 6b90bd4b
      Emese Revfy authored
      
      
      This patch allows to build the whole kernel with GCC plugins. It was ported from
      grsecurity/PaX. The infrastructure supports building out-of-tree modules and
      building in a separate directory. Cross-compilation is supported too.
      Currently the x86, arm, arm64 and uml architectures enable plugins.
      
      The directory of the gcc plugins is scripts/gcc-plugins. You can use a file or a directory
      there. The plugins compile with these options:
       * -fno-rtti: gcc is compiled with this option so the plugins must use it too
       * -fno-exceptions: this is inherited from gcc too
       * -fasynchronous-unwind-tables: this is inherited from gcc too
       * -ggdb: it is useful for debugging a plugin (better backtrace on internal
          errors)
       * -Wno-narrowing: to suppress warnings from gcc headers (ipa-utils.h)
       * -Wno-unused-variable: to suppress warnings from gcc headers (gcc_version
          variable, plugin-version.h)
      
      The infrastructure introduces a new Makefile target called gcc-plugins. It
      supports all gcc versions from 4.5 to 6.0. The scripts/gcc-plugin.sh script
      chooses the proper host compiler (gcc-4.7 can be built by either gcc or g++).
      This script also checks the availability of the included headers in
      scripts/gcc-plugins/gcc-common.h.
      
      The gcc-common.h header contains frequently included headers for GCC plugins
      and it has a compatibility layer for the supported gcc versions.
      
      The gcc-generate-*-pass.h headers automatically generate the registration
      structures for GIMPLE, SIMPLE_IPA, IPA and RTL passes.
      
      Note that 'make clean' keeps the *.so files (only the distclean or mrproper
      targets clean all) because they are needed for out-of-tree modules.
      
      Based on work created by the PaX Team.
      Signed-off-by: default avatarEmese Revfy <re.emese@gmail.com>
      Acked-by: default avatarKees Cook <keescook@chromium.org>
      Signed-off-by: default avatarMichal Marek <mmarek@suse.com>
      6b90bd4b
  26. 03 Jun, 2016 1 commit
    • Linus Walleij's avatar
      ARM: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB · 5c34a4e8
      Linus Walleij authored
      
      
      This replaces:
      
      - "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB" as this can
        now be selected directly.
      
      - "select ARCH_WANT_OPTIONAL_GPIOLIB" with no dependency: GPIOLIB
        is now selectable by everyone, so we need not declare our
        intent to select it.
      
      When ordering the symbols the following rationale was used:
      if the selects were in alphabetical order, I moved select GPIOLIB
      to be in alphabetical order, but if the selects were not
      maintained in alphabetical order, I just replaced
      "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB".
      
      Cc: Michael Büsch <m@bues.ch>
      Cc: arm@kernel.org
      Cc: linux-arm-kernel@lists.infradead.org
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
      5c34a4e8
  27. 21 May, 2016 2 commits
    • Petr Mladek's avatar
      printk/nmi: generic solution for safe printk in NMI · 42a0bb3f
      Petr Mladek authored
      printk() takes some locks and could not be used a safe way in NMI
      context.
      
      The chance of a deadlock is real especially when printing stacks from
      all CPUs.  This particular problem has been addressed on x86 by the
      commit a9edc880 ("x86/nmi: Perform a safe NMI stack trace on all
      CPUs").
      
      The patchset brings two big advantages.  First, it makes the NMI
      backtraces safe on all architectures for free.  Second, it makes all NMI
      messages almost safe on all architectures (the temporary buffer is
      limited.  We still should keep the number of messages in NMI context at
      minimum).
      
      Note that there already are several messages printed in NMI context:
      WARN_ON(in_nmi()), BUG_ON(in_nmi()), anything being printed out from MCE
      handlers.  These are not easy to avoid.
      
      This patch reuses most of the code and makes it generic.  It is useful
      for all messages and architectures that support NMI.
      
      The alternative printk_func is set when entering and is reseted when
      leaving NMI context.  It queues IRQ work to copy the messages into the
      main ring buffer in a safe context.
      
      __printk_nmi_flush() copies all available messages and reset the buffer.
      Then we could use a simple cmpxchg operations to get synchronized with
      writers.  There is also used a spinlock to get synchronized with other
      flushers.
      
      We do not longer use seq_buf because it depends on external lock.  It
      would be hard to make all supported operations safe for a lockless use.
      It would be confusing and error prone to make only some operations safe.
      
      The code is put into separate printk/nmi.c as suggested by Steven
      Rostedt.  It needs a per-CPU buffer and is compiled only on
      architectures that call nmi_enter().  This is achieved by the new
      HAVE_NMI Kconfig flag.
      
      The are MN10300 and Xtensa architectures.  We need to clean up NMI
      handling there first.  Let's do it separately.
      
      The patch is heavily based on the draft from Peter Zijlstra, see
      
        https://lkml.org/lkml/2015/6/10/327
      
      
      
      [arnd@arndb.de: printk-nmi: use %zu format string for size_t]
      [akpm@linux-foundation.org: min_t->min - all types are size_t here]
      Signed-off-by: default avatarPetr Mladek <pmladek@suse.com>
      Suggested-by: default avatarPeter Zijlstra <peterz@infradead.org>
      Suggested-by: default avatarSteven Rostedt <rostedt@goodmis.org>
      Cc: Jan Kara <jack@suse.cz>
      Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>	[arm part]
      Cc: Daniel Thompson <daniel.thompson@linaro.org>
      Cc: Jiri Kosina <jkosina@suse.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: David Miller <davem@davemloft.net>
      Cc: Daniel Thompson <daniel.thompson@linaro.org>
      Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      42a0bb3f
    • Jiri Slaby's avatar
      exit_thread: remove empty bodies · 5f56a5df
      Jiri Slaby authored
      
      
      Define HAVE_EXIT_THREAD for archs which want to do something in
      exit_thread. For others, let's define exit_thread as an empty inline.
      
      This is a cleanup before we change the prototype of exit_thread to
      accept a task parameter.
      
      [akpm@linux-foundation.org: fix mips]
      Signed-off-by: default avatarJiri Slaby <jslaby@suse.cz>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
      Cc: Aurelien Jacquiot <a-jacquiot@ti.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Chen Liqin <liqin.linux@gmail.com>
      Cc: Chris Metcalf <cmetcalf@mellanox.com>
      Cc: Chris Zankel <chris@zankel.net>
      Cc: David Howells <dhowells@redhat.com>
      Cc: Fenghua Yu <fenghua.yu@intel.com>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
      Cc: Haavard Skinnemoen <hskinnemoen@gmail.com>
      Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Helge Deller <deller@gmx.de>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
      Cc: James Hogan <james.hogan@imgtec.com>
      Cc: Jeff Dike <jdike@addtoit.com>
      Cc: Jesper Nilsson <jesper.nilsson@axis.com>
      Cc: Jiri Slaby <jslaby@suse.cz>
      Cc: Jonas Bonn <jonas@southpole.se>
      Cc: Koichi Yasutake <yasutake.koichi@jp.panasonic.com>
      Cc: Lennox Wu <lennox.wu@gmail.com>
      Cc: Ley Foon Tan <lftan@altera.com>
      Cc: Mark Salter <msalter@redhat.com>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Matt Turner <mattst88@gmail.com>
      Cc: Max Filippov <jcmvbkbc@gmail.com>
      Cc: Michael Ellerman <mpe@ellerman.id.au>
      Cc: Michal Simek <monstr@monstr.eu>
      Cc: Mikael Starvik <starvik@axis.com>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Rich Felker <dalias@libc.org>
      Cc: Richard Henderson <rth@twiddle.net>
      Cc: Richard Kuo <rkuo@codeaurora.org>
      Cc: Richard Weinberger <richard@nod.at>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Steven Miao <realmz6@gmail.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Vineet Gupta <vgupta@synopsys.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
      Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      5f56a5df
  28. 16 May, 2016 1 commit
    • Daniel Borkmann's avatar
      bpf: split HAVE_BPF_JIT into cBPF and eBPF variant · 6077776b
      Daniel Borkmann authored
      
      
      Split the HAVE_BPF_JIT into two for distinguishing cBPF and eBPF JITs.
      
      Current cBPF ones:
      
        # git grep -n HAVE_CBPF_JIT arch/
        arch/arm/Kconfig:44:    select HAVE_CBPF_JIT
        arch/mips/Kconfig:18:   select HAVE_CBPF_JIT if !CPU_MICROMIPS
        arch/powerpc/Kconfig:129:       select HAVE_CBPF_JIT
        arch/sparc/Kconfig:35:  select HAVE_CBPF_JIT
      
      Current eBPF ones:
      
        # git grep -n HAVE_EBPF_JIT arch/
        arch/arm64/Kconfig:61:  select HAVE_EBPF_JIT
        arch/s390/Kconfig:126:  select HAVE_EBPF_JIT if PACK_STACK && HAVE_MARCH_Z196_FEATURES
        arch/x86/Kconfig:94:    select HAVE_EBPF_JIT                    if X86_64
      
      Later code also needs this facility to check for eBPF JITs.
      Signed-off-by: default avatarDaniel Borkmann <daniel@iogearbox.net>
      Acked-by: default avatarAlexei Starovoitov <ast@kernel.org>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      6077776b
  29. 11 May, 2016 1 commit
    • Vladimir Zapolskiy's avatar
      irqchip: Add LPC32xx interrupt controller driver · 8cb17b5e
      Vladimir Zapolskiy authored
      The change adds improved support of NXP LPC32xx MIC, SIC1 and SIC2
      interrupt controllers.
      
      This is a list of new features in comparison to the legacy driver:
      * irq types are taken from device tree settings, no more need to
        hardcode them,
      * old driver is based on irq_domain_add_legacy, which causes problems
        with handling MIC hardware interrupt 0 produced by SIC1,
      * there is one driver for MIC, SIC1 and SIC2, no more need to handle
        them separately, e.g. have two separate handlers for SIC1 and SIC2,
      * the driver does not have any dependencies on hardcoded register
        offsets,
      * the driver is much simpler for maintenance,
      * SPARSE_IRQS option is supported.
      
      Legacy LPC32xx interrupt controller driver was broken since commit
      76ba59f8 ("genirq: Add irq_domain-aware core IRQ handler"), which
      requires a private interrupt handler, otherwise any SIC1 generated
      interrupt (mapped to MIC hwirq 0) breaks the kernel with the message
      "unexpected IRQ trap at vector 00".
      
      The change disables compilation of a legacy driver found at
      arch/arm/mach-lpc32xx/irq.c, the file will be removed in a separate
      commit.
      
      Fixes: 76ba59f8
      
       ("genirq: Add irq_domain-aware core IRQ handler")
      Tested-by: default avatarSylvain Lemieux <slemieux.tyco@gmail.com>
      Signed-off-by: default avatarVladimir Zapolskiy <vz@mleia.com>
      Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
      8cb17b5e
  30. 09 May, 2016 1 commit
    • Joel Stanley's avatar
      arm: Add Aspeed machine · 8c2ed9bc
      Joel Stanley authored
      
      
      Aspeed devices are a common Baseboard Management Controller (BMC)
      system on chip containing an ARM9 or ARM11 core, off-chip DDR RAM and
      support for a large number of peripherals.
      
      This patch adds basic support for the ast2400 and ast2500 machines,
      capable of booting to a prompt in QEMU (-M palmetto-bmc), on an
      Palmetto OpenPower development machine, and on the ast2500 EVB.
      Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
      8c2ed9bc