phy: rockchip-snps-pcie3: fix clearing PHP_GRF_PCIESEL_CON bits
Currently the PCIe v3 PHY driver only sets the pcie1ln_sel bits, but does not clear them because of an incorrect write mask. This fixes up the issue by using a newly introduced constant for the write mask. While at it it also introduces a proper GENMASK based constant for the PCIE30_PHY_MODE. Fixes: 2e9bffc4 ("phy: rockchip: Support PCIe v3") Signed-off-by:Sebastian Reichel <sebastian.reichel@collabora.com>
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