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Commit 9add2e54 authored by Cristian Ciocaltea's avatar Cristian Ciocaltea Committed by Sebastian Reichel
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arm64: dts: rockchip: Make use of HDMI0 PHY PLL on rock-5b


The initial vop2 support for rk3588 in mainline is not able to handle
all display modes supported by connected displays, e.g.
2560x1440-75.00Hz, 2048x1152-60.00Hz, 1024x768-60.00Hz.

Additionally, it doesn't cope with non-integer refresh rates like 59.94,
29.97, 23.98, etc.

Make use of the HDMI0 PHY PLL to support the additional display modes.

Note this requires commit "drm/rockchip: vop2: Improve display modes
handling on rk3588", which needs a rework to be upstreamable.

Signed-off-by: default avatarCristian Ciocaltea <cristian.ciocaltea@collabora.com>
parent 39d5b5eb
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