Add initial support for SDHCI controller in RK3528.

Only MMC Legacy and MMC High Speed (52MHz) mode is supported after this,
more work is needed to get the faster HS200/HS400/HS400ES modes working.

Variant tap and delay num is copied from vendor Linux tag
linux-6.1-stan-rkr5.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

RK3528 and RK3576 use different tap and delay num for cmdout and strbin.

Move tap and delay num for cmdout and strbin to driver data to prepare
for adding new SoCs.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Add pinctrl driver for RK3528.

Imported from vendor U-Boot linux-6.1-stan-rkr5 tag with adjustments
to use regmap_update_bits().

Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Add clock driver for RK3528.

Imported from vendor U-Boot linux-6.1-stan-rkr5 tag with minor
adjustments and fixes for mainline.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Add support for reading DRAM size information from PMUGRF os_reg18 reg.

Compared to most Rockchip SoCs the RK3528 use os_reg18 for DRAM info,
instead of os_reg2.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Rockchip RK3528 is a ARM-based SoC with quad-core Cortex-A53.

Add initial arch support for the RK3528 SoC.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Add support for generating Rockchip Boot Image for RK3528.

Similar to RK3568, the RK3528 has 64 KiB SRAM and 4 KiB of it is
reserved for BootROM.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Declare HASH at the top of the file to avoid needing #ifdefs in every
usage.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

At present simple-bin-spi relies on the u-boot.itb file created by the
simple-bin image. Use the template to avoid this, since Binman may
change to process images in parallel in the future.

Drop the filename to prevent another image being created which uses the
u-boot.itb file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>

Fix the indentation on the template. This is done in a separate patch
so that it is easier to review.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>

Move the FIT description into a template so that it can (later) be used
in multiple places in the image.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>

Add an fdtmap so it is possible to look at the image with 'binman ls'.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>

Declare these at the top of the file to avoid needing #ifdefs in every
usage.

Add a few comments to help with the remaining #ifdefs

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>

The U-Boot section is currently getting an invalid OS. Use the correct
value to fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>

When rgmii-rxid/txid/id phy-mode is used the MAC should not add RX
and/or TX delay. Currently RX/TX delay is configured as enabled using
zero as delay value for the rgmii-rxid/txid/id modes.

Change to disable RX and/or TX delay and using zero as delay value.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

When rgmii-rxid/txid/id phy-mode is used the MAC should not add RX
and/or TX delay. Currently RX/TX delay is configured as enabled using
zero as delay value for the rgmii-rxid/txid/id modes.

Change to disable RX and/or TX delay and using zero as delay value.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Add a minimal generic RK3399 board that only have eMMC, SDMMC, SPI flash
and USB OTG enabled. This defconfig can be used to boot from eMMC,
SD-card or SPI flash on most RK3399 boards that follow reference board
design.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Add a minimal generic RK3328 board that only have eMMC, SDMMC, SPI flash
and USB OTG enabled. This defconfig can be used to boot from eMMC,
SD-card or SPI flash on most RK3328 boards that follow reference board
design.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

The v2 image format supports defining a load address and flag for each
embedded image.

Add initial support for writing the image load address and flag to the
v2 image format header.

This may later be used for RK3576 to embed a minimal initial image that
if required to fix booting from SD-card due to a BootROM issue.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

The v2 image format can support up to 4 embedded images that can be
loaded by the BootROM using the back-to-bootrom method.

Currently two input files can be passed in using the datafile parameter,
separated by a colon (":").

Extend the datafile parameter parsing to support up to 4 input files
separated by a colon (":") for use with the v2 image format.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

The vendor boot_merger tool support a ALIGN parameter that is used to
define offset alignment of the embedded images.

Vendor use this for RK3576 to change offset alignment from the common
2 KiB to 4 KiB, presumably it may have something to do with UFS.
Testing with eMMC has shown that using a 512-byte alignment also work.

Add support for overriding offset alignment in case this is needed for
e.g. RK3576 in the future.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

The v2 image format embeds boot0 and boot1 parameters, the vendor tool
boot_merger may write these parameters based on the rkboot miniall.ini
files.

E.g. a RK3576 boot image may contain a boot1 parameter that signals
BootROM or vendor blobs to use 1 GHz instead of the regular 24 MHz rate
for the high precision timer.

Add support for printing boot0 and boot1 parameters, e.g.:

  > tools/mkimage -l rk3576_idblock_v1.09.107.img
  Rockchip Boot Image (v2)
  Boot1 2: 0x100
  Image 1: 4096 @ 0x1000
  - Load address: 0x3ffc0000
  Image 2: 77824 @ 0x2000
  - Load address: 0x3ff81000
  Image 3: 262144 @ 0x15000

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

The v2 image format can embed up to 4 data files compared to the two
init and boot data files using the older image format.

Add support for displaying more of the image header information that
exists in the v2 image format, e.g. image load address and flag.

Example for v2 image format:

  > tools/mkimage -l rk3576_idblock_v1.09.107.img
  Rockchip Boot Image (v2)
  Image 1: 4096 @ 0x1000
  - Load address: 0x3ffc0000
  Image 2: 77824 @ 0x2000
  - Load address: 0x3ff81000
  Image 3: 262144 @ 0x15000

Example for older image format:

  > tools/mkimage -l u-boot-rockchip.bin
  Rockchip RK32 (SD/MMC) Boot Image
  Init Data: 20480 @ 0x800
  Boot Data: 112640 @ 0x5800

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Split 32-bit size_and_off and size_and_nimage fields of the v2 image
format header into their own 16-bit size, offset and num_images fields.

Set num_images based on number of images passed by the datafile
parameter and size based on the offset to the hash field to fix using a
single init data file and no boot data file for the v2 image format.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

The Rockchip RK3576 SoC uses a different DRAM base address, 0x40000000,
compared to prior SoCs.

Add default options that should work when 0x40000000 is used as DRAM
base address. Use same offsets as before, just below 64 MiB.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

New Rockchip SoCs will typically require use or an external TPL when
support for the SoC is added to U-Boot.

Move imply ROCKCHIP_EXTERNAL_TPL under SoC Kconfig symbol to remove a
future likelihood of a long "default y if" line.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

The ROCKCHIP_COMMON_STACK_ADDR Kconfig option was originally enabled
in the SoC specific Kconfig files to ease during the initial migration
to use common stack addresses.

All boards for the affected SoCs have been migrated to use common stack
addresses. Migrate to use an imply under the SoC symbol instead of
re-define the symbol in each SoC specific Kconfig file.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

A few Rockchip ARMv7 SoCs use 0x60000000 as DRAM base address instead of
the more common 0x0 DRAM base address used on AArch64 SoCs.

Add default options that should work for these ARMv7 SoCs. Same offsets
as before are used, just below 64 MiB. Hex values have also been padded
to improve alignment.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

The Kconfig symbol ROCKCHIP_COMMON_STACK_ADDR currently imply the
TPL_ROCKCHIP_COMMON_BOARD option when TPL=y. This is inconvenient for a
SoC with very limited SRAM to use a custom tpl.c together with the
common stack addresses.

Move any imply TPL_ROCKCHIP_COMMON_BOARD to under the SoC symbol, where
it belongs. Add the missing imply to RK3328 and PX30 use a SoC specific
tpl.c and only expect imply TPL_LIBGENERIC_SUPPORT.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

These power rails must be on very early for the U-Boos TPL banner to be
show over debug UART.

This reverts commit 4576e65a.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

The PP1500 and PP3000 power rails must be on very early for the U-Boot
TPL banner to be shown on debug UART.

Enable TPL_GPIO Kconfig option for bob and kevin to allow use of
spl_gpio.h functions in TPL.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

These power rails must be on very early for the U-Boos SPL banner to be
show over debug UART.

This reverts commit af518a1d.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Most Rockchip SoCs use 0x0 as DRAM base address, however some SoCs use
0x60000000 and RK3576 use 0x40000000 as DRAM base address.

CFG_SYS_SDRAM_BASE is defined with correct address for each SoC and
U-Boot proper use this to set correct gd->ram_base in setup_dest_addr().

SPL never assign any value to gd->ram_base and instead use the default,
0x0. Set correct gd->ram_base in dram_init() to ensure its correctness
in SPL.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

U-Boot only works correctly when it uses RAM below the 4G address
boundary on Rockchip SoCs. Limit usable gd->ram_top to max 4G.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Allow the first bank to extend beyond 4 GiB when the blob of space for
peripheral is located before start of DRAM, e.g. when start of DRAM
is 0x40000000 and continue beyond the 4 GiB mark.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

When MMC_SDHCI_SDMA=y or MMC_SDHCI_ADMA=y and PIO mode is used
dma_unmap_single() is called on an unmapped address, 0x0. This may
result in a Synchronous Abort:

  ## Checking hash(es) for Image atf-1 ... sha256+ OK
  CMD_SEND:16
                  ARG                      0x00000200
                  MMC_RSP_R1,5,6,7         0x00000900
  CMD_SEND:18
                  ARG                      0x00004005
  "Synchronous Abort" handler, esr 0x96000147
  elr: 00000000400015bc lr : 0000000040012b4c
  x 0: 0000000000008000 x 1: 0000000000092600
  x 2: 0000000000000040 x 3: 000000000000003f
  x 4: 0000000000000030 x 5: 0000000000000001
  x 6: 0000000000000001 x 7: 0000000000000000
  x 8: 000000000000000a x 9: 0000000000000090
  x10: 0000000043dffc68 x11: 0000000043c00440
  x12: 0000000043c00440 x13: ffffffffbfe00000
  x14: 000000000000031c x15: 0000000240000000
  x16: 000000004001145c x17: 0000000000000032
  x18: 0000000043dffef0 x19: 0000000043c00000
  x20: 0000000043dffbc8 x21: 0000000000000000
  x22: 00000000000f3d95 x23: 0000000000000002
  x24: 0000000000000493 x25: 0000000000092600
  x26: 0000000000000001 x27: 0000000000000001
  x28: 0000000000000008 x29: 0000000043dffab0

  Code: d2800082 9ac32042 d1000443 8a230000 (d5087620)
  Resetting CPU ...

  resetting ...

Fix this by only dma_unmap_single() when DMA mode is used and
sdhci_prepare_dma() has been called to map host->start_addr.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

The pinmux bits for GPIO2-B0 to GPIO2-B6 actually have 2 bits width,
correct the bank flag for GPIO2-B. The pinmux bits for GPIO2-B7 is
recalculated so it remain unchanged. Add missing GPIO3-B1 to GPIO3-B7
pinmux data to rk3328_mux_recalced_data as mux register offset for these
pins does not follow rockchip convention.

This matches changes in following Linux commits:
- e8448a6c817c ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO2-B pins")
- 5ef6914e0bf5 ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO3-B pins")
- 128f71fe014f ("pinctrl: rockchip: correct RK3328 iomux width flag for GPIO2-B pins")

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

BootROM leave GPIO4_D6 configured as SDMMC_PWREN function and DW MMC
driver set PWREN high in dwmci_init().

However, HW revision prior to v1.2 must pull GPIO4_D6 low to access
sdmmc. For HW revision v1.2 the state of GPIO4_D6 has no impact.

Upstream Linux commit 26c100232b09 "arm64: dts: rockchip: Fix sdmmc
access on rk3308-rock-s0 v1.1 boards" fixed this issue by adding a
vcc_sd regulator.

Include the new vcc_sd regulator in SPL and enable required Kconfig
options to set GPIO4_D6 low to fix reading sdmmc on v1.1 hw revision.

Fixes: 25438c40 ("board: rockchip: Add Radxa ROCK S0")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

BootROM leave GPIO4_D6 configured as SDMMC_PWREN function and DW MCI
driver set PRWEN high on MMC_POWER_UP and low on MMC_POWER_OFF.
Similarly U-Boot also set PRWEN high before accessing mmc.

However, HW revision prior to v1.2 must pull GPIO4_D6 low to access
sdmmc. For HW revision v1.2 the state of GPIO4_D6 has no impact.

Model an always-on active low fixed regulator using GPIO4_D6 to fix
use of sdmmc on older HW revisions of the board.

Fixes: adeb5d2a4ba4 ("arm64: dts: rockchip: Add Radxa ROCK S0")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20241119230838.4137130-1-jonas@kwiboo.se


Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: 26c100232b09ced0857306ac9831a4fa9c9aa231 ]

(cherry picked from commit ca8e0bedbc790b19b11efc223677d178b8eeb74e)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Nothing is calling the function rk_board_init() and the io-domain driver
can handle the functions intended purpose based on information from DT.

Cleanup by removing the unused rk_board_init() function and re-sort
included headers.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>