- Jan 19, 2024
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Eugen Hristev authored
Change to build the BL31 from open source. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
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- Jan 18, 2024
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Bullseye is outdated; bump to build container to bookworm which is the latest stable Debian version. Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
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There is no need to use a fixed toolchain; let's use the toolchain provided by Debian. Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
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There is no need to use my fork which may go away at a moment's notice. Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
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Currently the build is slow as it doesn't use all of the CPU cores. Add the correct flags such that the build uses all CPU cores. Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
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Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
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Eugen Hristev authored
Enable DFU and related configs, expand stack and buffers to hold downloaded image. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
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Eugen Hristev authored
Prepare env variables for DFU Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
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Eugen Hristev authored
In case SPL was booted from USB, add the gadget as the boot device for the 'same-as-spl' boot order next device. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
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Eugen Hristev authored
Add DFU as a possible SPL boot media if the boot device is a gadget device. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
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Eugen Hristev authored
Add bootph-all to gadget nodes to have the gadget available in SPL. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
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- Jan 15, 2024
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Eugen Hristev authored
Since EP0 transactions need to be completed before the controller halt sequence is finished, this may take some time depending on the host and the enabled functions. Increase the controller halt timeout, so that we give the controller sufficient time to handle EP0 transfers. Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com> Link: https://lore.kernel.org/r/20220901193625.8727-4-quic_wcheng@quicinc.com Cherry-picked from Linux: 461ee467507c ("usb: dwc3: Increase DWC3 controller halt timeout") Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
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[ Nguyen/Greg: Ported from Linux kernel commit f4fd84ae0765a ("usb: dwc3: core: Only handle soft-reset in DCTL") ] Make sure not to set run_stop bit or link state change request while initiating soft-reset. Register read-modify-write operation may unintentionally start the controller before the initialization completes with its previous DCTL value, which can cause initialization failure. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
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[ Nguyen/Felipe/Greg: Ported from Linux kernel commit 5b738211fb59 ("usb: dwc3: gadget: Don't send unintended link state change") ] DCTL.ULSTCHNGREQ is a write-only field. When doing a read-modify-write to DCTL, the driver must make sure that there's no unintended link state change request from whatever is read from DCTL.ULSTCHNGREQ. Set link state change to no-action when the driver writes to DCTL. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
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[ Felipe: Ported from Linux kernel commit f59dcab17629 ("usb: dwc3: core: improve reset sequence") ] According to Synopsys Databook, we shouldn't be relying on GCTL.CORESOFTRESET bit as that's only for debugging purposes. Instead, let's use DCTL.CSFTRST if we're OTG or PERIPHERAL mode. Host side block will be reset by XHCI driver if necessary. Note that this reduces amount of time spent on dwc3_probe() by a long margin. We're still gonna wait for reset to finish for a long time (default to 1ms max), but tests show that the reset polling loop executed at most 19 times (modprobe dwc3 && modprobe -r dwc3 executed 1000 times in a row). Without proper core reset, observing random issues like when the USB(DWC3) is in device mode, the host device is not able to detect the USB device. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> [eugen.hristev@collabora.com: keep the PHY resets code] Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
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Eugen Hristev authored
For environment in SPL, all these defines are required, otherwise build fails: [...] include/env_default.h:120:9: note: in expansion of macro ‘CFG_EXTRA_ENV_SETTINGS’ 120 | CFG_EXTRA_ENV_SETTINGS | ^~~~~~~~~~~~~~~~~~~~~~ In file included from env/common.c:32: [...] Environment in SPL is needed e.g. for DFU, as dfu_alt is kept as env variable. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
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Eugen Hristev authored
Unlike it's Linux counterpart, clk_get_rate can return a negative value, -ve. The driver does not take that into account, stores the rate into an unsigned long, and if clk_get_rate fails, it will take into consideration the actual value and wrongly program the hardware. E.g. on error -2 (no such entry), the rate will be 18446744073709551614 and this will be subsequently used by the driver to program the DWC3 To fix this, exit the function if the value is negative. Fixes: 6bae0eb5 ("usb: dwc3: Calculate REFCLKPER based on reference clock") Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
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Eugen Hristev authored
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
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Eugen Hristev authored
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
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Eugen Hristev authored
Build also the rockusb binary using the boot merger. Store it as an artifact Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
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Eugen Hristev authored
We need prebuilt artifacts for Rock-5B board. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
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Eugen Hristev authored
Will be replaced by internal pipeline. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
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Eugen Hristev authored
Add .ini file for use with boot merger tool to create DDR blob + SPL binary. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
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This needs to be reworked, possible into mkimage parameters that can be passed from binman. Or let binman add a "keep-embedded" prop singling mkimage that data should remain embedded. With this we should also be able to remove the u-boot,spl-fifo-mode prop from other rk33 arm64 devices. Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
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Per dw_mmc databook, it's recommended to reset the host controller if some data-related error occurred. Implement a reset mechanism. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Co-developed-by: Jason Zhu <jason.zhu@rock-chips.com> Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com> [eugen.hristev@collabora.com: modified a bit the variables initialization] Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
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- Jan 08, 2024
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Tom Rini authored
Signed-off-by: Tom Rini <trini@konsulko.com>
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- Jan 06, 2024
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Jan Kiszka authored
This restores support for IOT2050 by widely synchronizing its DT files with the Linux kernel. We additionally need to add the alias restoration that is still waiting for its upstream merge and the not-yet-upstreamed bits needed for watchdog reboot detection. Fixes: 4dbdc847 ("arm: dts: k3-am654: pull in dtb update from Linux") Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
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- Jan 04, 2024
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Nishanth Menon authored
Kernel commit 1b77265626a4 ("arm64: dts: ti: k3-j7200-mcu-wakeup: Add HyperBus node") was merged to kernel without its dependent patch [1]. Similar fix is needed in U-Boot, and hbmc currently breaks boot. Till this gets fixed in U-Boot, disable the config by default so that the hbmc probe that happens in board/ti/j721e/evm.c will not take place and lead to boot failure. This is similar to the approach in commit 5b267159 ("configs: j721e: Remove HBMC_AM654 config"), introduced to j7200 evm platform. [1] https://lore.kernel.org/all/20230424184810.29453-1-afd@ti.com/ Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
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- Jan 03, 2024
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Anthony Loiseau authored
A "F: foo*" entry does not match any foo*/ folder nor its subtree, another "F: foo*/" entry is needed for that. Add missing foo*/ entries where an existing folder was ignored, so this folder and its subtree is properly covered. Arm tegra, Arm TI and Environment sections are affected. Cc: Tom Rini <trini@konsulko.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Svyatoslav Ryhel <clamor95@gmail.com> Cc: Tom Rini <trini@konsulko.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Anthony Loiseau <anthony.loiseau@allcircuits.com>
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Mattijs Korpershoek authored
Commit 19a91f24 ("Create a new boot/ directory") moved the android_ab.c code under boot/android_ab but did not update the MAINTAINERS entry. Update it so that the maintainer will get cc'ed again. Fixes: 19a91f24 ("Create a new boot/ directory") Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
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Tom Rini authored
Signed-off-by: Tom Rini <trini@konsulko.com>
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Tom Rini authored
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
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Nishanth Menon authored
Sync with kernel v6.7-rc1 and sync up the u-boot dts files accordingly. Signed-off-by: Nishanth Menon <nm@ti.com>
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Nishanth Menon authored
main_timer0 is used by u-boot as the tick-timer. Add it to the soc devices list so it an be enabled via the k3 power controller. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
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Tom Rini authored
Bryan Brattlof <bb@ti.com> says: Hello Again Everyone! This series gets the am65x booting again along with syncing the device tree files with v6.7-rc1 Linux. The bulk of these patches unify the WKUP SPL board file with the arm64 files to make future syncs from Linux much easier. In the end the DTBs should look a lot like what the DTBs look like for the am64x which is fairly similar to the am65x. For those interested in what UART boot looks like: https://paste.sr.ht/~bryanb/7df8a645dc548912cd806abd5ecab967ef3287bc
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Bryan Brattlof authored
Many nodes are reused between WKUP SPL, MAIN SPL, and U-Boot. Using bootph-pre-ram is causing these nodes to be present in SPL builds but pruned away during the U-Boot build. Convert these nodes to bootph-all so they will remain no matter which dtb build is happening. Tested-by: Tom Rini <trini@konsulko.com> Signed-off-by: Bryan Brattlof <bb@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com>
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Bryan Brattlof authored
With the Linux and U-Boot board dtb files unified, we now have a duplicate mcu secure proxy node. Remove it Tested-by: Tom Rini <trini@konsulko.com> Signed-off-by: Bryan Brattlof <bb@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com>
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Bryan Brattlof authored
The dummy_clock node is used to help the drivers probe the IO needed to setup consoles and boot media to load firmware into the SoC. This dummy_clock isn't a device that exists nor does it exist in the mcu domain. So move it from cbass_mcu to the root node to avoid any confusion. Tested-by: Tom Rini <trini@konsulko.com> Signed-off-by: Bryan Brattlof <bb@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com>
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Bryan Brattlof authored
These aliases are not needed in U-Boot. Remove them Tested-by: Tom Rini <trini@konsulko.com> Signed-off-by: Bryan Brattlof <bb@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com>
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Bryan Brattlof authored
With the Linux and U-Boot board dtb files unified, we have duplicate properties in the root node. Remove them Tested-by: Tom Rini <trini@konsulko.com> Signed-off-by: Bryan Brattlof <bb@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com>
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