diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 25ae608463987068ba2626ca9e8e97c2bc26976b..ba65e50189780457ebf5690e887007157ce1cefe 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1260,13 +1260,6 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
 {
 	struct drm_i915_private *i915 = engine->i915;
 
-	if (IS_GEN(i915, 12)) {
-		/* Wa_1406941453:tgl */
-		wa_masked_en(wal,
-			     SAMPLER_MODE,
-			     SAMPLER_ENABLE_SMALL_PL);
-	}
-
 	if (IS_GEN(i915, 11)) {
 		/* This is not an Wa. Enable for better image quality */
 		wa_masked_en(wal,
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 5e3a6178aff440f1006008a3ae7b18dfa7bb261d..f8f52ae6cc6fea8138d24be9246dedd20e80b789 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8965,9 +8965,6 @@ enum {
 #define   GEN9_DG_MIRROR_FIX_ENABLE	(1 << 5)
 #define   GEN9_CCS_TLB_PREFETCH_ENABLE	(1 << 3)
 
-#define SAMPLER_MODE			_MMIO(0xe18c)
-#define   SAMPLER_ENABLE_SMALL_PL	(1 << 15)
-
 #define GEN8_ROW_CHICKEN		_MMIO(0xe4f0)
 #define   FLOW_CONTROL_ENABLE		(1 << 15)
 #define   PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE	(1 << 8)