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kernel

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  • user avatar
    Kumar Gala authored
    The new e500mc core from Freescale is based on the e500v2 but with the
    following changes:
    
    * Supports only the Enhanced Debug Architecture (DSRR0/1, etc)
    * Floating Point
    * No SPE
    * Supports lwsync
    * Doorbell Exceptions
    * Hypervisor
    * Cache line size is now 64-bytes (e500v1/v2 have a 32-byte cache line)
    
    Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
    3dfa8773
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