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This patch replaces PLL3 multiplication setting for DDR clock frequency. - After changes, new PLL3 multiplication setting: MD19 MD17 : DDR clock frequency ------------------------------- 0 0 : DDR3200 0 1 : DDR2800 1 0 : DDR2400 1 1 : DDR1600 - Before changes, old PLL3 multiplication setting: MD19 MD17 : DDR clock frequency ------------------------------- 0 0 : DDR3200 0 1 : DDR2133 1 0 : Prohibited setting 1 1 : DDR1600 Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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