From 120829521db198123375fb0f665a64c3aaf4dd2f Mon Sep 17 00:00:00 2001
From: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Date: Wed, 13 Jul 2022 14:14:56 +0300
Subject: [PATCH] media: cedrus: Fix endless loop in cedrus_h265_skip_bits()
The busy status bit may never de-assert if number of programmed skip
bits is incorrect, resulting in a kernel hang because the bit is polled
endlessly in the code. Fix it by adding timeout for the bit-polling.
This problem is reproducible by setting the data_bit_offset field of
the HEVC slice params to a wrong value by userspace.
Cc: stable@vger.kernel.org
Reported-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
---
drivers/staging/media/sunxi/cedrus/cedrus_h265.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
index 6d36d2ff2bac5..28d90fec9aea6 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
@@ -264,6 +264,7 @@ static void cedrus_h265_pred_weight_write(struct cedrus_dev *dev,
static void cedrus_h265_skip_bits(struct cedrus_dev *dev, int num)
{
int count = 0;
+ u32 reg;
while (count < num) {
int tmp = min(num - count, 32);
@@ -271,8 +272,11 @@ static void cedrus_h265_skip_bits(struct cedrus_dev *dev, int num)
cedrus_write(dev, VE_DEC_H265_TRIGGER,
VE_DEC_H265_TRIGGER_FLUSH_BITS |
VE_DEC_H265_TRIGGER_TYPE_N_BITS(tmp));
- while (cedrus_read(dev, VE_DEC_H265_STATUS) & VE_DEC_H265_STATUS_VLD_BUSY)
- udelay(1);
+
+ if (read_poll_timeout(cedrus_read, reg,
+ !(reg & VE_DEC_H265_STATUS_VLD_BUSY),
+ 1, 1000, false, dev, VE_DEC_H265_STATUS))
+ dev_err_ratelimited(dev->dev, "timed out waiting to skip bits\n");
count += tmp;
}
--
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