diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 2127aba3550b5d611970bc8d3dccd7d5a60fa301..ff12a53a258158ba7c2f1eecdf65fdb7c2c79c38 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1199,24 +1199,23 @@ static int pci_dev_wait(struct pci_dev *dev, char *reset_type, int timeout)
  */
 int pci_power_up(struct pci_dev *dev)
 {
-	bool need_restore;
-	pci_power_t state;
+	bool need_restore = false;
 	u16 pmcsr;
+	int ret;
 
-	platform_pci_set_power_state(dev, PCI_D0);
-
-	if (!dev->pm_cap) {
-		state = platform_pci_get_power_state(dev);
-		if (state == PCI_UNKNOWN)
-			dev->current_state = PCI_D0;
-		else
-			dev->current_state = state;
+	ret = platform_pci_set_power_state(dev, PCI_D0);
+	if (!ret) {
+		pci_update_current_state(dev, PCI_D0);
+	} else if (!dev->pm_cap) { /* Fall back to PCI_D0 */
+		dev->current_state = PCI_D0;
+		return 0;
+	}
 
-		if (state == PCI_D0)
-			return 0;
+	if (dev->current_state == PCI_D0)
+		return 0;
 
+	if (!dev->pm_cap)
 		return -EIO;
-	}
 
 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);
 	if (PCI_POSSIBLE_ERROR(pmcsr)) {
@@ -1226,24 +1225,26 @@ int pci_power_up(struct pci_dev *dev)
 		return -EIO;
 	}
 
-	state = pmcsr & PCI_PM_CTRL_STATE_MASK;
-
-	need_restore = (state == PCI_D3hot || dev->current_state >= PCI_D3hot) &&
-			!(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET);
-
-	if (state == PCI_D0)
-		goto end;
-
 	/*
 	 * Force the entire word to 0. This doesn't affect PME_Status, disables
 	 * PME_En, and sets PowerState to 0.
 	 */
-	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, 0);
+	if (dev->current_state >= PCI_D3hot) {
+		if ((pmcsr & PCI_PM_CTRL_STATE_MASK) == PCI_D3hot &&
+		    !(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET))
+			need_restore = true;
+
+		pmcsr = 0;
+	} else {
+		pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
+	}
+
+	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);
 
 	/* Mandatory transition delays; see PCI PM 1.2. */
-	if (state == PCI_D3hot)
+	if (dev->current_state == PCI_D3hot)
 		pci_dev_d3_sleep(dev);
-	else if (state == PCI_D2)
+	else if (dev->current_state == PCI_D2)
 		udelay(PCI_PM_D2_DELAY);
 
 end:
@@ -1280,20 +1281,21 @@ static int pci_set_full_power_state(struct pci_dev *dev)
 	if (dev->current_state != PCI_D0) {
 		pci_info_ratelimited(dev, "Refused to change power state from %s to D0\n",
 				     pci_power_name(dev->current_state));
-	} else if (ret > 0) {
-		/*
-		 * According to section 5.4.1 of the "PCI BUS POWER MANAGEMENT
-		 * INTERFACE SPECIFICATION, REV. 1.2", a device transitioning
-		 * from D3hot to D0 _may_ perform an internal reset, thereby
-		 * going to "D0 Uninitialized" rather than "D0 Initialized".
-		 * For example, at least some versions of the 3c905B and the
-		 * 3c556B exhibit this behaviour.
-		 *
-		 * At least some laptop BIOSen (e.g. the Thinkpad T21) leave
-		 * devices in a D3hot state at boot.  Consequently, we need to
-		 * restore at least the BARs so that the device will be
-		 * accessible to its driver.
-		 */
+
+	/*
+	 * According to section 5.4.1 of the "PCI BUS POWER MANAGEMENT
+	 * INTERFACE SPECIFICATION, REV. 1.2", a device transitioning
+	 * from D3hot to D0 _may_ perform an internal reset, thereby
+	 * going to "D0 Uninitialized" rather than "D0 Initialized".
+	 * For example, at least some versions of the 3c905B and the
+	 * 3c556B exhibit this behaviour.
+	 *
+	 * At least some laptop BIOSen (e.g. the Thinkpad T21) leave
+	 * devices in a D3hot state at boot.  Consequently, we need to
+	 * restore at least the BARs so that the device will be
+	 * accessible to its driver.
+	 */
+	if (need_restore)
 		pci_restore_bars(dev);
 	}