Commit 675c354a authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'char-misc-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver patches from Greg KH:
 "Here's the big char/misc driver updates for 3.15-rc1.

  Lots of various things here, including the new mcb driver subsystem.

  All of these have been in linux-next for a while"

* tag 'char-misc-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (118 commits)
  extcon: Move OF helper function to extcon core and change function name
  extcon: of: Remove unnecessary function call by using the name of device_node
  extcon: gpio: Use SIMPLE_DEV_PM_OPS macro
  extcon: palmas: Use SIMPLE_DEV_PM_OPS macro
  mei: don't use deprecated DEFINE_PCI_DEVICE_TABLE macro
  mei: amthif: fix checkpatch error
  mei: client.h fix checkpatch errors
  mei: use cl_dbg where appropriate
  mei: fix Unnecessary space after function pointer name
  mei: report consistently copy_from/to_user failures
  mei: drop pr_fmt macros
  mei: make me hw headers private to me hw.
  mei: fix memory leak of pending write cb objects
  mei: me: do not reset when less than expected data is received
  drivers: mcb: Fix build error discovered by 0-day bot
  cs5535-mfgpt: Simplify dependencies
  spmi: pm: drop bus-level PM suspend/resume routines
  spmi: pmic_arb: make selectable on ARCH_QCOM
  Drivers: hv: vmbus: Increase the limit on the number of pfns we can handle
  pch_phub: Report error writing MAC back to user
  ...
parents c7092914 1b3fa22e
......@@ -14,7 +14,7 @@ DOCBOOKS := z8530book.xml device-drivers.xml \
genericirq.xml s390-drivers.xml uio-howto.xml scsi.xml \
80211.xml debugobjects.xml sh.xml regulator.xml \
alsa-driver-api.xml writing-an-alsa-driver.xml \
tracepoint.xml drm.xml media_api.xml
tracepoint.xml drm.xml media_api.xml w1.xml
include $(srctree)/Documentation/DocBook/media/Makefile
......
<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
"http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
<book id="w1id">
<bookinfo>
<title>W1: Dallas' 1-wire bus</title>
<authorgroup>
<author>
<firstname>David</firstname>
<surname>Fries</surname>
<affiliation>
<address>
<email>David@Fries.net</email>
</address>
</affiliation>
</author>
</authorgroup>
<copyright>
<year>2013</year>
<!--
<holder></holder>
-->
</copyright>
<legalnotice>
<para>
This documentation is free software; you can redistribute
it and/or modify it under the terms of the GNU General Public
License version 2.
</para>
<para>
This program is distributed in the hope that it will be
useful, but WITHOUT ANY WARRANTY; without even the implied
warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
For more details see the file COPYING in the source
distribution of Linux.
</para>
</legalnotice>
</bookinfo>
<toc></toc>
<chapter id="w1_internal">
<title>W1 API internal to the kernel</title>
<sect1 id="w1_internal_api">
<title>W1 API internal to the kernel</title>
<sect2 id="w1.h">
<title>drivers/w1/w1.h</title>
<para>W1 core functions.</para>
!Idrivers/w1/w1.h
</sect2>
<sect2 id="w1.c">
<title>drivers/w1/w1.c</title>
<para>W1 core functions.</para>
!Idrivers/w1/w1.c
</sect2>
<sect2 id="w1_family.h">
<title>drivers/w1/w1_family.h</title>
<para>Allows registering device family operations.</para>
!Idrivers/w1/w1_family.h
</sect2>
<sect2 id="w1_family.c">
<title>drivers/w1/w1_family.c</title>
<para>Allows registering device family operations.</para>
!Edrivers/w1/w1_family.c
</sect2>
<sect2 id="w1_int.c">
<title>drivers/w1/w1_int.c</title>
<para>W1 internal initialization for master devices.</para>
!Edrivers/w1/w1_int.c
</sect2>
<sect2 id="w1_netlink.h">
<title>drivers/w1/w1_netlink.h</title>
<para>W1 external netlink API structures and commands.</para>
!Idrivers/w1/w1_netlink.h
</sect2>
<sect2 id="w1_io.c">
<title>drivers/w1/w1_io.c</title>
<para>W1 input/output.</para>
!Edrivers/w1/w1_io.c
!Idrivers/w1/w1_io.c
</sect2>
</sect1>
</chapter>
</book>
......@@ -145,7 +145,7 @@ static void cn_test_timer_func(unsigned long __data)
memcpy(m + 1, data, m->len);
cn_netlink_send(m, 0, GFP_ATOMIC);
cn_netlink_send(m, 0, 0, GFP_ATOMIC);
kfree(m);
}
......
......@@ -410,6 +410,7 @@ Your cooperation is appreciated.
194 = /dev/zkshim Zero-Knowledge network shim control
195 = /dev/elographics/e2201 Elographics touchscreen E271-2201
196 = /dev/vfio/vfio VFIO userspace driver interface
197 = /dev/pxa3xx-gcu PXA3xx graphics controller unit driver
198 = /dev/sexec Signed executable interface
199 = /dev/scanners/cuecat :CueCat barcode scanner
200 = /dev/net/tun TAP/TUN network device
......@@ -451,6 +452,7 @@ Your cooperation is appreciated.
236 = /dev/mapper/control Device-Mapper control device
237 = /dev/loop-control Loopback control device
238 = /dev/vhost-net Host kernel accelerator for virtio net
239 = /dev/uhid User-space I/O driver support for HID subsystem
240-254 Reserved for local use
255 Reserved for MISC_DYNAMIC_MINOR
......
* Device tree bindings for Texas instruments AEMIF controller
The Async External Memory Interface (EMIF16/AEMIF) controller is intended to
provide a glue-less interface to a variety of asynchronous memory devices like
ASRA M, NOR and NAND memory. A total of 256M bytes of any of these memories
can be accessed at any given time via four chip selects with 64M byte access
per chip select. Synchronous memories such as DDR1 SD RAM, SDR SDRAM
and Mobile SDR are not supported.
Documentation:
Davinci DM646x - http://www.ti.com/lit/ug/sprueq7c/sprueq7c.pdf
OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
Kestone - http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf
Required properties:
- compatible: "ti,davinci-aemif"
"ti,keystone-aemif"
"ti,da850-aemif"
- reg: contains offset/length value for AEMIF control registers
space.
- #address-cells: Must be 2. The partition number has to be encoded in the
first address cell and it may accept values 0..N-1
(N - total number of partitions). It's recommended to
assign N-1 number for the control partition. The second
cell is the offset into the partition.
- #size-cells: Must be set to 1.
- ranges: Contains memory regions. There are two types of
ranges/partitions:
- CS-specific partition/range. If continuous, must be
set up to reflect the memory layout for 4 chipselects,
if not then additional range/partition can be added and
child device can select the proper one.
- control partition which is common for all CS
interfaces.
- clocks: the clock feeding the controller clock. Required only
if clock tree data present in device tree.
See clock-bindings.txt
- clock-names: clock name. It has to be "aemif". Required only if clock
tree data present in device tree, in another case don't
use it.
See clock-bindings.txt
- clock-ranges: Empty property indicating that child nodes can inherit
named clocks. Required only if clock tree data present
in device tree.
See clock-bindings.txt
Child chip-select (cs) nodes contain the memory devices nodes connected to
such as NOR (e.g. cfi-flash) and NAND (ti,davinci-nand, see davinci-nand.txt).
There might be board specific devices like FPGAs.
Required child cs node properties:
- #address-cells: Must be 2.
- #size-cells: Must be 1.
- ranges: Empty property indicating that child nodes can inherit
memory layout.
- clock-ranges: Empty property indicating that child nodes can inherit
named clocks. Required only if clock tree data present
in device tree.
- ti,cs-chipselect: number of chipselect. Indicates on the aemif driver
which chipselect is used for accessing the memory. For
compatibles "ti,davinci-aemif" and "ti,keystone-aemif"
it can be in range [0-3]. For compatible
"ti,da850-aemif" range is [2-5].
Optional child cs node properties:
- ti,cs-bus-width: width of the asynchronous device's data bus
8 or 16 if not preset 8
- ti,cs-select-strobe-mode: enable/disable select strobe mode
In select strobe mode chip select behaves as
the strobe and is active only during the strobe
period. If present then enable.
- ti,cs-extended-wait-mode: enable/disable extended wait mode
if set, the controller monitors the EMIFWAIT pin
mapped to that chip select to determine if the
device wants to extend the strobe period. If
present then enable.
- ti,cs-min-turnaround-ns: minimum turn around time, ns
Time between the end of one asynchronous memory
access and the start of another asynchronous
memory access. This delay is not incurred
between a read followed by read or a write
followed by a write to same chip select.
- ti,cs-read-setup-ns: read setup width, ns
Time between the beginning of a memory cycle
and the activation of read strobe.
Minimum value is 1 (0 treated as 1).
- ti,cs-read-strobe-ns: read strobe width, ns
Time between the activation and deactivation of
the read strobe.
Minimum value is 1 (0 treated as 1).
- ti,cs-read-hold-ns: read hold width, ns
Time between the deactivation of the read
strobe and the end of the cycle (which may be
either an address change or the deactivation of
the chip select signal.
Minimum value is 1 (0 treated as 1).
- ti,cs-write-setup-ns: write setup width, ns
Time between the beginning of a memory cycle
and the activation of write strobe.
Minimum value is 1 (0 treated as 1).
- ti,cs-write-strobe-ns: write strobe width, ns
Time between the activation and deactivation of
the write strobe.
Minimum value is 1 (0 treated as 1).
- ti,cs-write-hold-ns: write hold width, ns
Time between the deactivation of the write
strobe and the end of the cycle (which may be
either an address change or the deactivation of
the chip select signal.
Minimum value is 1 (0 treated as 1).
If any of the above parameters are absent, current parameter value will be taken
from the corresponding HW reg.
Example for aemif, davinci nand and nor flash chip select shown below.
memory-controller@21000A00 {
compatible = "ti,davinci-aemif";
#address-cells = <2>;
#size-cells = <1>;
clocks = <&clkaemif 0>;
clock-names = "aemif";
clock-ranges;
reg = <0x21000A00 0x00000100>;
ranges = <0 0 0x70000000 0x10000000
1 0 0x21000A00 0x00000100>;
/*
* Partition0: CS-specific memory range which is
* implemented as continuous physical memory region
* Partition1: control memory range
*/
nand:cs2 {
#address-cells = <2>;
#size-cells = <1>;
clock-ranges;
ranges;
ti,cs-chipselect = <2>;
/* all timings in nanoseconds */
ti,cs-min-turnaround-ns = <0>;
ti,cs-read-hold-ns = <7>;
ti,cs-read-strobe-ns = <42>;
ti,cs-read-setup-ns = <14>;
ti,cs-write-hold-ns = <7>;
ti,cs-write-strobe-ns = <42>;
ti,cs-write-setup-ns = <14>;
nand@0,0x8000000 {
compatible = "ti,davinci-nand";
reg = <0 0x8000000 0x4000000
1 0x0000000 0x0000100>;
/*
* Partition0, offset 0x8000000, size 0x4000000
* Partition1, offset 0x0000000, size 0x0000100
*/
.. see davinci-nand.txt
};
};
nor:cs0 {
#address-cells = <2>;
#size-cells = <1>;
clock-ranges;
ranges;
ti,cs-chipselect = <0>;
/* all timings in nanoseconds */
ti,cs-min-turnaround-ns = <0>;
ti,cs-read-hold-ns = <8>;
ti,cs-read-strobe-ns = <40>;
ti,cs-read-setup-ns = <14>;
ti,cs-write-hold-ns = <7>;
ti,cs-write-strobe-ns = <40>;
ti,cs-write-setup-ns = <14>;
ti,cs-bus-width = <16>;
flash@0,0x0000000 {
compatible = "cfi-flash";
reg = <0 0x0000000 0x4000000>;
...
};
};
};
Allwinner sunxi-sid
Required properties:
- compatible: "allwinner,sun4i-sid" or "allwinner,sun7i-a20-sid".
- compatible: "allwinner,sun4i-a10-sid" or "allwinner,sun7i-a20-sid"
- reg: Should contain registers location and length
Example for sun4i:
sid@01c23800 {
compatible = "allwinner,sun4i-sid";
compatible = "allwinner,sun4i-a10-sid";
reg = <0x01c23800 0x10>
};
......
......@@ -8,9 +8,44 @@ Required properties:
- reg : SRAM iomem address range
Reserving sram areas:
---------------------
Each child of the sram node specifies a region of reserved memory. Each
child node should use a 'reg' property to specify a specific range of
reserved memory.
Following the generic-names recommended practice, node names should
reflect the purpose of the node. Unit address (@<address>) should be
appended to the name.
Required properties in the sram node:
- #address-cells, #size-cells : should use the same values as the root node
- ranges : standard definition, should translate from local addresses
within the sram to bus addresses
Required properties in the area nodes:
- reg : iomem address range, relative to the SRAM range
Optional properties in the area nodes:
- compatible : standard definition, should contain a vendor specific string
in the form <vendor>,[<device>-]<usage>
Example:
sram: sram@5c000000 {
compatible = "mmio-sram";
reg = <0x5c000000 0x40000>; /* 256 KiB SRAM at address 0x5c000000 */
#adress-cells = <1>;
#size-cells = <1>;
ranges = <0 0x5c000000 0x40000>;
smp-sram@100 {
compatible = "socvendor,smp-sram";
reg = <0x100 0x50>;
};
};
Qualcomm SPMI Controller (PMIC Arbiter)
The SPMI PMIC Arbiter is found on the Snapdragon 800 Series. It is an SPMI
controller with wrapping arbitration logic to allow for multiple on-chip
devices to control a single SPMI master.
The PMIC Arbiter can also act as an interrupt controller, providing interrupts
to slave devices.
See spmi.txt for the generic SPMI controller binding requirements for child
nodes.
See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for
generic interrupt controller binding documentation.
Required properties:
- compatible : should be "qcom,spmi-pmic-arb".
- reg-names : must contain:
"core" - core registers
"intr" - interrupt controller registers
"cnfg" - configuration registers
- reg : address + size pairs describing the PMIC arb register sets; order must
correspond with the order of entries in reg-names
- #address-cells : must be set to 2
- #size-cells : must be set to 0
- qcom,ee : indicates the active Execution Environment identifier (0-5)
- qcom,channel : which of the PMIC Arb provided channels to use for accesses (0-5)
- interrupts : interrupt list for the PMIC Arb controller, must contain a
single interrupt entry for the peripheral interrupt
- interrupt-names : corresponding interrupt names for the interrupts
listed in the 'interrupts' property, must contain:
"periph_irq" - summary interrupt for PMIC peripherals
- interrupt-controller : boolean indicator that the PMIC arbiter is an interrupt controller
- #interrupt-cells : must be set to 4. Interrupts are specified as a 4-tuple:
cell 1: slave ID for the requested interrupt (0-15)
cell 2: peripheral ID for requested interrupt (0-255)
cell 3: the requested peripheral interrupt (0-7)
cell 4: interrupt flags indicating level-sense information, as defined in
dt-bindings/interrupt-controller/irq.h
Example:
spmi {
compatible = "qcom,spmi-pmic-arb";
reg-names = "core", "intr", "cnfg";
reg = <0xfc4cf000 0x1000>,
<0xfc4cb000 0x1000>,
<0xfc4ca000 0x1000>;
interrupt-names = "periph_irq";
interrupts = <0 190 0>;
qcom,ee = <0>;
qcom,channel = <0>;
#address-cells = <2>;
#size-cells = <0>;
interrupt-controller;
#interrupt-cells = <4>;
};
System Power Management Interface (SPMI) Controller
This document defines a generic set of bindings for use by SPMI controllers. A
controller is modelled in device tree as a node with zero or more child nodes,
each representing a unique slave on the bus.
Required properties:
- #address-cells : must be set to 2
- #size-cells : must be set to 0
Child nodes:
An SPMI controller node can contain zero or more child nodes representing slave
devices on the bus. Child 'reg' properties are specified as an address, type
pair. The address must be in the range 0-15 (4 bits). The type must be one of
SPMI_USID (0) or SPMI_GSID (1) for Unique Slave ID or Group Slave ID respectively.
These are the identifiers "statically assigned by the system integrator", as
per the SPMI spec.
Each child node must have one and only one 'reg' entry of type SPMI_USID.
#include <dt-bindings/spmi/spmi.h>
spmi@.. {
compatible = "...";
reg = <...>;
#address-cells = <2>;
#size-cells <0>;
child@0 {
compatible = "...";
reg = <0 SPMI_USID>;
};
child@7 {
compatible = "...";
reg = <7 SPMI_USID
3 SPMI_GSID>;
};
};
......@@ -9,7 +9,12 @@ Overwriting the EEPROM is not something you should do daily, and it is
expected to only happen during manufacturing. For this reason, the
module makes it unlikely for the random user to change a working EEPROM.
The module takes the following measures:
However, since the EEPROM may include application-specific information
other than the identification, later versions of this packages added
write-support through sysfs. See *note Accessing the EEPROM::.
To avoid damaging the EEPROM content, the module takes the following
measures:
* It accepts a `file=' argument (within /lib/firmware) and if no
such argument is received, it doesn't write anything to EEPROM
......@@ -70,56 +75,24 @@ first time.
[ 132.899872] fake-fmc: Product name: FmcDelay1ns4cha
Writing to the EEPROM
Accessing the EEPROM
=====================
Once you have created a binary file for your EEPROM, you can write it
to the storage medium using the fmc-write-eeprom (See *note
fmc-write-eeprom::, while relying on a carrier driver. The procedure
here shown here uses the SPEC driver
(`http://www.ohwr.org/projects/spec-sw').
The example assumes no driver is already loaded (actually, I unloaded
them by hand as everything loads automatically at boot time after you
installed the modules), and shows kernel messages together with
commands. Here the prompt is spusa.root# and two SPEC cards are plugged
in the system.
spusa.root# insmod fmc.ko
spusa.root# insmod spec.ko
[13972.382818] spec 0000:02:00.0: probe for device 0002:0000
[13972.392773] spec 0000:02:00.0: got file "fmc/spec-init.bin", 1484404 (0x16a674) bytes
[13972.591388] spec 0000:02:00.0: FPGA programming successful
[13972.883011] spec 0000:02:00.0: EEPROM has no FRU information
[13972.888719] spec 0000:02:00.0: No device_id filled, using index
[13972.894676] spec 0000:02:00.0: No mezzanine_name found
[13972.899863] /home/rubini/wip/spec-sw/kernel/spec-gpio.c - spec_gpio_init
[13972.906578] spec 0000:04:00.0: probe for device 0004:0000
[13972.916509] spec 0000:04:00.0: got file "fmc/spec-init.bin", 1484404 (0x16a674) bytes
[13973.115096] spec 0000:04:00.0: FPGA programming successful
[13973.401798] spec 0000:04:00.0: EEPROM has no FRU information
[13973.407474] spec 0000:04:00.0: No device_id filled, using index
[13973.413417] spec 0000:04:00.0: No mezzanine_name found
[13973.418600] /home/rubini/wip/spec-sw/kernel/spec-gpio.c - spec_gpio_init
spusa.root# ls /sys/bus/fmc/devices
fmc-0000 fmc-0001
spusa.root# insmod fmc-write-eeprom.ko busid=0x0200 file=fdelay-eeprom.bin
[14103.966259] spec 0000:02:00.0: Matching an generic driver (no ID)
[14103.975519] spec 0000:02:00.0: programming 6155 bytes
[14126.373762] spec 0000:02:00.0: write_eeprom: success
[14126.378770] spec 0000:04:00.0: Matching an generic driver (no ID)
[14126.384903] spec 0000:04:00.0: fmc_write_eeprom: no filename given: not programming
[14126.392600] fmc_write_eeprom: probe of fmc-0001 failed with error -2
Reading back the EEPROM
=======================
In order to read back the binary content of the EEPROM of your
mezzanine device, the bus creates a read-only sysfs file called eeprom
for each mezzanine it knows about:
spusa.root# cd /sys/bus/fmc/devices; ls -l */eeprom
-r--r--r-- 1 root root 8192 Apr 9 16:53 FmcDelay1ns4cha-f001/eeprom
-r--r--r-- 1 root root 8192 Apr 9 17:19 fake-design-for-testing-f002/eeprom
-r--r--r-- 1 root root 8192 Apr 9 17:19 fake-design-for-testing-f003/eeprom
-r--r--r-- 1 root root 8192 Apr 9 17:19 fmc-f004/eeprom
The bus creates a sysfs binary file called eeprom for each mezzanine it
knows about:
spusa.root# cd /sys/bus/fmc/devices; ls -l */eeprom
-r--r--r-- 1 root root 8192 Feb 21 12:30 FmcAdc100m14b4cha-0800/eeprom
-r--r--r-- 1 root root 8192 Feb 21 12:30 FmcDelay1ns4cha-0200/eeprom
-r--r--r-- 1 root root 8192 Feb 21 12:30 FmcDio5cha-0400/eeprom
Everybody can read the files and the superuser can also modify it, but
the operation may on the carrier driver, if the carrier is unable to
access the I2C bus. For example, the spec driver can access the bus
only with its golden gateware: after a mezzanine driver reprogrammed
the FPGA with a custom circuit, the carrier is unable to access the
EEPROM and returns ENOTSUPP.
An alternative way to write the EEPROM is the mezzanine driver
fmc-write-eeprom (See *note fmc-write-eeprom::), but the procedure is
more complex.
......@@ -21,8 +21,6 @@ Notes and limitations.
- The weak pullup current is a minimum of 0.9mA and maximum of 6.0mA.
- The 5V strong pullup is supported with a minimum of 5.9mA and a
maximum of 30.4 mA. (From DS2490.pdf)
- While the ds2490 supports a hardware search the code doesn't take
advantage of it (in tested case it only returned first device).
- The hardware will detect when devices are attached to the bus on the
next bus (reset?) operation, however only a message is printed as
the core w1 code doesn't make use of the information. Connecting
......
......@@ -5,8 +5,8 @@ Message types.
=============
There are three types of messages between w1 core and userspace:
1. Events. They are generated each time new master or slave device
found either due to automatic or requested search.
1. Events. They are generated each time a new master or slave device
is found either due to automatic or requested search.
2. Userspace commands.
3. Replies to userspace commands.
......@@ -131,7 +131,7 @@ of the w1_netlink_cmd structure and cn_msg.len will be equal to the sum
of the sizeof(struct w1_netlink_msg) and sizeof(struct w1_netlink_cmd).
If reply is generated for master or root command (which do not have