Commit 91c8028c authored by David S. Miller's avatar David S. Miller
Browse files
parents 81aded24 1d1a79b5
......@@ -6238,7 +6238,8 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
}
if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
e_info("PHY reset is blocked due to SOL/IDER session.\n");
dev_info(&pdev->dev,
"PHY reset is blocked due to SOL/IDER session.\n");
/* Set initial default active device features */
netdev->features = (NETIF_F_SG |
......@@ -6288,7 +6289,7 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
break;
if (i == 2) {
e_err("The NVM Checksum Is Not Valid\n");
dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
err = -EIO;
goto err_eeprom;
}
......@@ -6298,13 +6299,15 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
/* copy the MAC address */
if (e1000e_read_mac_addr(&adapter->hw))
e_err("NVM Read Error while reading MAC address\n");
dev_err(&pdev->dev,
"NVM Read Error while reading MAC address\n");
memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
if (!is_valid_ether_addr(netdev->perm_addr)) {
e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
netdev->perm_addr);
err = -EIO;
goto err_eeprom;
}
......
......@@ -199,16 +199,19 @@ static int __devinit e1000_validate_option(unsigned int *value,
case enable_option:
switch (*value) {
case OPTION_ENABLED:
e_info("%s Enabled\n", opt->name);
dev_info(&adapter->pdev->dev, "%s Enabled\n",
opt->name);
return 0;
case OPTION_DISABLED:
e_info("%s Disabled\n", opt->name);
dev_info(&adapter->pdev->dev, "%s Disabled\n",
opt->name);
return 0;
}
break;
case range_option:
if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
e_info("%s set to %i\n", opt->name, *value);
dev_info(&adapter->pdev->dev, "%s set to %i\n",
opt->name, *value);
return 0;
}
break;
......@@ -220,7 +223,8 @@ static int __devinit e1000_validate_option(unsigned int *value,
ent = &opt->arg.l.p[i];
if (*value == ent->i) {
if (ent->str[0] != '\0')
e_info("%s\n", ent->str);
dev_info(&adapter->pdev->dev, "%s\n",
ent->str);
return 0;
}
}
......@@ -230,8 +234,8 @@ static int __devinit e1000_validate_option(unsigned int *value,
BUG();
}
e_info("Invalid %s value specified (%i) %s\n", opt->name, *value,
opt->err);
dev_info(&adapter->pdev->dev, "Invalid %s value specified (%i) %s\n",
opt->name, *value, opt->err);
*value = opt->def;
return -1;
}
......@@ -251,8 +255,10 @@ void __devinit e1000e_check_options(struct e1000_adapter *adapter)
int bd = adapter->bd_number;
if (bd >= E1000_MAX_NIC) {
e_notice("Warning: no configuration for board #%i\n", bd);
e_notice("Using defaults for all values\n");
dev_notice(&adapter->pdev->dev,
"Warning: no configuration for board #%i\n", bd);
dev_notice(&adapter->pdev->dev,
"Using defaults for all values\n");
}
{ /* Transmit Interrupt Delay */
......@@ -366,27 +372,32 @@ void __devinit e1000e_check_options(struct e1000_adapter *adapter)
* default values
*/
if (adapter->itr > 4)
e_info("%s set to default %d\n", opt.name,
adapter->itr);
dev_info(&adapter->pdev->dev,
"%s set to default %d\n", opt.name,
adapter->itr);
}
adapter->itr_setting = adapter->itr;
switch (adapter->itr) {
case 0:
e_info("%s turned off\n", opt.name);
dev_info(&adapter->pdev->dev, "%s turned off\n",
opt.name);
break;
case 1:
e_info("%s set to dynamic mode\n", opt.name);
dev_info(&adapter->pdev->dev,
"%s set to dynamic mode\n", opt.name);
adapter->itr = 20000;
break;
case 3:
e_info("%s set to dynamic conservative mode\n",
opt.name);
dev_info(&adapter->pdev->dev,
"%s set to dynamic conservative mode\n",
opt.name);
adapter->itr = 20000;
break;
case 4:
e_info("%s set to simplified (2000-8000 ints) mode\n",
opt.name);
dev_info(&adapter->pdev->dev,
"%s set to simplified (2000-8000 ints) mode\n",
opt.name);
break;
default:
/*
......
......@@ -34,11 +34,11 @@ obj-$(CONFIG_IXGBE) += ixgbe.o
ixgbe-objs := ixgbe_main.o ixgbe_common.o ixgbe_ethtool.o \
ixgbe_82599.o ixgbe_82598.o ixgbe_phy.o ixgbe_sriov.o \
ixgbe_mbx.o ixgbe_x540.o ixgbe_sysfs.o ixgbe_lib.o
ixgbe_mbx.o ixgbe_x540.o ixgbe_lib.o
ixgbe-$(CONFIG_IXGBE_DCB) += ixgbe_dcb.o ixgbe_dcb_82598.o \
ixgbe_dcb_82599.o ixgbe_dcb_nl.o
ixgbe-$(CONFIG_IXGBE_PTP) += ixgbe_ptp.o
ixgbe-$(CONFIG_IXGBE_HWMON) += ixgbe_sysfs.o
ixgbe-$(CONFIG_FCOE:m=y) += ixgbe_fcoe.o
......@@ -561,6 +561,7 @@ struct ixgbe_adapter {
spinlock_t tmreg_lock;
struct cyclecounter cc;
struct timecounter tc;
int rx_hwtstamp_filter;
u32 base_incval;
u32 cycle_speed;
#endif /* CONFIG_IXGBE_PTP */
......@@ -718,6 +719,7 @@ extern void ixgbe_ptp_overflow_check(struct ixgbe_adapter *adapter);
extern void ixgbe_ptp_tx_hwtstamp(struct ixgbe_q_vector *q_vector,
struct sk_buff *skb);
extern void ixgbe_ptp_rx_hwtstamp(struct ixgbe_q_vector *q_vector,
union ixgbe_adv_rx_desc *rx_desc,
struct sk_buff *skb);
extern int ixgbe_ptp_hwtstamp_ioctl(struct ixgbe_adapter *adapter,
struct ifreq *ifr, int cmd);
......
......@@ -790,12 +790,10 @@ static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
total_packets += tx_buffer->gso_segs;
#ifdef CONFIG_IXGBE_PTP
if (unlikely(tx_buffer->tx_flags &
IXGBE_TX_FLAGS_TSTAMP))
ixgbe_ptp_tx_hwtstamp(q_vector,
tx_buffer->skb);
if (unlikely(tx_buffer->tx_flags & IXGBE_TX_FLAGS_TSTAMP))
ixgbe_ptp_tx_hwtstamp(q_vector, tx_buffer->skb);
#endif
/* free the skb */
dev_kfree_skb_any(tx_buffer->skb);
......@@ -1399,8 +1397,7 @@ static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
ixgbe_rx_checksum(rx_ring, rx_desc, skb);
#ifdef CONFIG_IXGBE_PTP
if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS))
ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector, skb);
ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector, rx_desc, skb);
#endif
if ((dev->features & NETIF_F_HW_VLAN_RX) &&
......
......@@ -26,6 +26,7 @@
*******************************************************************************/
#include "ixgbe.h"
#include <linux/export.h>
#include <linux/ptp_classify.h>
/*
* The 82599 and the X540 do not have true 64bit nanosecond scale
......@@ -100,6 +101,10 @@
#define NSECS_PER_SEC 1000000000ULL
#endif
static struct sock_filter ptp_filter[] = {
PTP_FILTER
};
/**
* ixgbe_ptp_read - read raw cycle counter (to be used by time counter)
* @cc - the cyclecounter structure
......@@ -307,13 +312,14 @@ void ixgbe_ptp_check_pps_event(struct ixgbe_adapter *adapter, u32 eicr)
!(adapter->flags2 & IXGBE_FLAG2_PTP_PPS_ENABLED))
return;
switch (hw->mac.type) {
case ixgbe_mac_X540:
if (eicr & IXGBE_EICR_TIMESYNC)
if (unlikely(eicr & IXGBE_EICR_TIMESYNC)) {
switch (hw->mac.type) {
case ixgbe_mac_X540:
ptp_clock_event(adapter->ptp_clock, &event);
break;
default:
break;
break;
default:
break;
}
}
}
......@@ -424,6 +430,68 @@ void ixgbe_ptp_overflow_check(struct ixgbe_adapter *adapter)
}
}
/**
* ixgbe_ptp_match - determine if this skb matches a ptp packet
* @skb: pointer to the skb
* @hwtstamp: pointer to the hwtstamp_config to check
*
* Determine whether the skb should have been timestamped, assuming the
* hwtstamp was set via the hwtstamp ioctl. Returns non-zero when the packet
* should have a timestamp waiting in the registers, and 0 otherwise.
*
* V1 packets have to check the version type to determine whether they are
* correct. However, we can't directly access the data because it might be
* fragmented in the SKB, in paged memory. In order to work around this, we
* use skb_copy_bits which will properly copy the data whether it is in the
* paged memory fragments or not. We have to copy the IP header as well as the
* message type.
*/
static int ixgbe_ptp_match(struct sk_buff *skb, int rx_filter)
{
struct iphdr iph;
u8 msgtype;
unsigned int type, offset;
if (rx_filter == HWTSTAMP_FILTER_NONE)
return 0;
type = sk_run_filter(skb, ptp_filter);
if (likely(rx_filter == HWTSTAMP_FILTER_PTP_V2_EVENT))
return type & PTP_CLASS_V2;
/* For the remaining cases actually check message type */
switch (type) {
case PTP_CLASS_V1_IPV4:
skb_copy_bits(skb, OFF_IHL, &iph, sizeof(iph));
offset = ETH_HLEN + (iph.ihl << 2) + UDP_HLEN + OFF_PTP_CONTROL;
break;
case PTP_CLASS_V1_IPV6:
offset = OFF_PTP6 + OFF_PTP_CONTROL;
break;
default:
/* other cases invalid or handled above */
return 0;
}
/* Make sure our buffer is long enough */
if (skb->len < offset)
return 0;
skb_copy_bits(skb, offset, &msgtype, sizeof(msgtype));
switch (rx_filter) {
case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
return (msgtype == IXGBE_RXMTRL_V1_SYNC_MSG);
break;
case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
return (msgtype == IXGBE_RXMTRL_V1_DELAY_REQ_MSG);
break;
default:
return 0;
}
}
/**
* ixgbe_ptp_tx_hwtstamp - utility function which checks for TX time stamp
* @q_vector: structure containing interrupt and ring information
......@@ -473,6 +541,7 @@ void ixgbe_ptp_tx_hwtstamp(struct ixgbe_q_vector *q_vector,
/**
* ixgbe_ptp_rx_hwtstamp - utility function which checks for RX time stamp
* @q_vector: structure containing interrupt and ring information
* @rx_desc: the rx descriptor
* @skb: particular skb to send timestamp with
*
* if the timestamp is valid, we convert it into the timecounter ns
......@@ -480,6 +549,7 @@ void ixgbe_ptp_tx_hwtstamp(struct ixgbe_q_vector *q_vector,
* is passed up the network stack
*/
void ixgbe_ptp_rx_hwtstamp(struct ixgbe_q_vector *q_vector,
union ixgbe_adv_rx_desc *rx_desc,
struct sk_buff *skb)
{
struct ixgbe_adapter *adapter;
......@@ -497,21 +567,33 @@ void ixgbe_ptp_rx_hwtstamp(struct ixgbe_q_vector *q_vector,
hw = &adapter->hw;
tsyncrxctl = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL);
/* Check if we have a valid timestamp and make sure the skb should
* have been timestamped */
if (likely(!(tsyncrxctl & IXGBE_TSYNCRXCTL_VALID) ||
!ixgbe_ptp_match(skb, adapter->rx_hwtstamp_filter)))
return;
/*
* Always read the registers, in order to clear a possible fault
* because of stagnant RX timestamp values for a packet that never
* reached the queue.
*/
regval |= (u64)IXGBE_READ_REG(hw, IXGBE_RXSTMPL);
regval |= (u64)IXGBE_READ_REG(hw, IXGBE_RXSTMPH) << 32;
/*
* If this bit is set, then the RX registers contain the time stamp. No
* other packet will be time stamped until we read these registers, so
* read the registers to make them available again. Because only one
* packet can be time stamped at a time, we know that the register
* values must belong to this one here and therefore we don't need to
* compare any of the additional attributes stored for it.
* If the timestamp bit is set in the packet's descriptor, we know the
* timestamp belongs to this packet. No other packet can be
* timestamped until the registers for timestamping have been read.
* Therefor only one packet with this bit can be in the queue at a
* time, and the rx timestamp values that were in the registers belong
* to this packet.
*
* If nothing went wrong, then it should have a skb_shared_tx that we
* can turn into a skb_shared_hwtstamps.
*/
if (!(tsyncrxctl & IXGBE_TSYNCRXCTL_VALID))
if (unlikely(!ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS)))
return;
spin_lock_irqsave(&adapter->tmreg_lock, flags);
......@@ -539,6 +621,11 @@ void ixgbe_ptp_rx_hwtstamp(struct ixgbe_q_vector *q_vector,
* type has to be specified. Matching the kind of event packet is
* not supported, with the exception of "all V2 events regardless of
* level 2 or 4".
*
* Since hardware always timestamps Path delay packets when timestamping V2
* packets, regardless of the type specified in the register, only use V2
* Event mode. This more accurately tells the user what the hardware is going
* to do anyways.
*/
int ixgbe_ptp_hwtstamp_ioctl(struct ixgbe_adapter *adapter,
struct ifreq *ifr, int cmd)
......@@ -582,41 +669,30 @@ int ixgbe_ptp_hwtstamp_ioctl(struct ixgbe_adapter *adapter,
tsync_rx_mtrl = IXGBE_RXMTRL_V1_DELAY_REQ_MSG;
is_l4 = true;
break;
case HWTSTAMP_FILTER_PTP_V2_EVENT:
case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
case HWTSTAMP_FILTER_PTP_V2_SYNC:
case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_L2_L4_V2;
tsync_rx_mtrl = IXGBE_RXMTRL_V2_SYNC_MSG;
is_l2 = true;
is_l4 = true;
config.rx_filter = HWTSTAMP_FILTER_SOME;
break;
case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_L2_L4_V2;
tsync_rx_mtrl = IXGBE_RXMTRL_V2_DELAY_REQ_MSG;
is_l2 = true;
is_l4 = true;
config.rx_filter = HWTSTAMP_FILTER_SOME;
break;
case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
case HWTSTAMP_FILTER_PTP_V2_EVENT:
tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_EVENT_V2;
config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
is_l2 = true;
is_l4 = true;
config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
break;
case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
case HWTSTAMP_FILTER_ALL:
default:
/*
* register RXMTRL must be set, therefore it is not
* possible to time stamp both V1 Sync and Delay_Req messages
* and hardware does not support timestamping all packets
* => return error
* register RXMTRL must be set in order to do V1 packets,
* therefore it is not possible to time stamp both V1 Sync and
* Delay_Req messages and hardware does not support
* timestamping all packets => return error
*/
config.rx_filter = HWTSTAMP_FILTER_NONE;
return -ERANGE;
}
......@@ -626,6 +702,9 @@ int ixgbe_ptp_hwtstamp_ioctl(struct ixgbe_adapter *adapter,
return 0;
}
/* Store filter value for later use */
adapter->rx_hwtstamp_filter = config.rx_filter;
/* define ethertype filter for timestamped packets */
if (is_l2)
IXGBE_WRITE_REG(hw, IXGBE_ETQF(3),
......@@ -861,6 +940,10 @@ void ixgbe_ptp_init(struct ixgbe_adapter *adapter)
return;
}
/* initialize the ptp filter */
if (ptp_filter_init(ptp_filter, ARRAY_SIZE(ptp_filter)))
e_dev_warn("ptp_filter_init failed\n");
spin_lock_init(&adapter->tmreg_lock);
ixgbe_ptp_start_cyclecounter(adapter);
......
......@@ -37,7 +37,6 @@
#include <linux/netdevice.h>
#include <linux/hwmon.h>
#ifdef CONFIG_IXGBE_HWMON
/* hwmon callback functions */
static ssize_t ixgbe_hwmon_show_location(struct device *dev,
struct device_attribute *attr,
......@@ -241,5 +240,4 @@ int ixgbe_sysfs_init(struct ixgbe_adapter *adapter)
exit:
return rc;
}
#endif /* CONFIG_IXGBE_HWMON */
......@@ -2419,7 +2419,7 @@ typedef u32 ixgbe_physical_layer;
*/
/* BitTimes (BT) conversion */
#define IXGBE_BT2KB(BT) ((BT + 1023) / (8 * 1024))
#define IXGBE_BT2KB(BT) ((BT + (8 * 1024 - 1)) / (8 * 1024))
#define IXGBE_B2BT(BT) (BT * 8)
/* Calculate Delay to respond to PFC */
......@@ -2450,24 +2450,31 @@ typedef u32 ixgbe_physical_layer;
#define IXGBE_PCI_DELAY 10000
/* Calculate X540 delay value in bit times */
#define IXGBE_FILL_RATE (36 / 25)
#define IXGBE_DV_X540(LINK, TC) (IXGBE_FILL_RATE * \
(IXGBE_B2BT(LINK) + IXGBE_PFC_D + \
(2 * IXGBE_CABLE_DC) + \
(2 * IXGBE_ID_X540) + \
IXGBE_HD + IXGBE_B2BT(TC)))
#define IXGBE_DV_X540(_max_frame_link, _max_frame_tc) \
((36 * \
(IXGBE_B2BT(_max_frame_link) + \
IXGBE_PFC_D + \
(2 * IXGBE_CABLE_DC) + \
(2 * IXGBE_ID_X540) + \
IXGBE_HD) / 25 + 1) + \
2 * IXGBE_B2BT(_max_frame_tc))
/* Calculate 82599, 82598 delay value in bit times */
#define IXGBE_DV(LINK, TC) (IXGBE_FILL_RATE * \
(IXGBE_B2BT(LINK) + IXGBE_PFC_D + \
(2 * IXGBE_CABLE_DC) + (2 * IXGBE_ID) + \
IXGBE_HD + IXGBE_B2BT(TC)))
#define IXGBE_DV(_max_frame_link, _max_frame_tc) \
((36 * \
(IXGBE_B2BT(_max_frame_link) + \
IXGBE_PFC_D + \
(2 * IXGBE_CABLE_DC) + \
(2 * IXGBE_ID) + \
IXGBE_HD) / 25 + 1) + \
2 * IXGBE_B2BT(_max_frame_tc))
/* Calculate low threshold delay values */
#define IXGBE_LOW_DV_X540(TC) (2 * IXGBE_B2BT(TC) + \
(IXGBE_FILL_RATE * IXGBE_PCI_DELAY))
#define IXGBE_LOW_DV(TC) (2 * IXGBE_LOW_DV_X540(TC))
#define IXGBE_LOW_DV_X540(_max_frame_tc) \
(2 * IXGBE_B2BT(_max_frame_tc) + \
(36 * IXGBE_PCI_DELAY / 25) + 1)
#define IXGBE_LOW_DV(_max_frame_tc) \
(2 * IXGBE_LOW_DV_X540(_max_frame_tc))
/* Software ATR hash keys */
#define IXGBE_ATR_BUCKET_HASH_KEY 0x3DAD14E2
......
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