Commit d0cd64b0 authored by Yonghong Song's avatar Yonghong Song Committed by Thomas Gleixner
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x86/idt: Remove X86_TRAP_BP initialization in idt_setup_traps()

Commit b70543a0("x86/idt: Move regular trap init to tables") moves
regular trap init for each trap vector into a table based
initialization. It introduced the initialization for vector X86_TRAP_BP
which was not in the code which it replaced. This breaks uprobe
functionality for x86_32; the probed program segfaults instead of handling
the probe proper.

The reason for this is that TRAP_BP is set up as system interrupt gate
(DPL3) in the early IDT and then replaced by a regular interrupt gate
(DPL0) in idt_setup_traps(). The DPL0 restriction causes the int3 trap
to fail with a #GP resulting in a SIGSEGV of the probed program.

On 64bit this does not cause a problem because the IDT entry is replaced
with a system interrupt gate (DPL3) with interrupt stack afterwards.

Remove X86_TRAP_BP from the def_idts table which is used in
idt_setup_traps(). Remove a redundant entry for X86_TRAP_NMI in def_idts
while at it. Tested on both x86_64 and x86_32.

[ tglx: Amended changelog with a description of the root cause ]

Fixes: b70543a0

("x86/idt: Move regular trap init to tables")
Reported-and-tested-by: default avatarYonghong Song <>
Signed-off-by: default avatarYonghong Song <>
Signed-off-by: default avatarThomas Gleixner <>
parent a743bbee
......@@ -92,8 +92,6 @@ static const __initdata struct idt_data def_idts[] = {
INTG(X86_TRAP_DF, double_fault),
INTG(X86_TRAP_DB, debug),
INTG(X86_TRAP_NMI, nmi),
INTG(X86_TRAP_BP, int3),
#ifdef CONFIG_X86_MCE
INTG(X86_TRAP_MC, &machine_check),
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