Commit f0571ab1 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Maxime Ripard
Browse files

ARM: dts: sun7i: Add VE (Video Engine) module clock node



The video engine has its own module clock, which also includes a
reset control for it.
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent 1ccc4939
......@@ -527,6 +527,15 @@
"dram_de_mp", "dram_ace";
};
ve_clk: clk@01c2013c {
#clock-cells = <0>;
#reset-cells = <0>;
compatible = "allwinner,sun4i-a10-ve-clk";
reg = <0x01c2013c 0x4>;
clocks = <&pll4>;
clock-output-names = "ve";
};
codec_clk: clk@01c20140 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-codec-clk";
......
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