1. 19 Jan, 2018 1 commit
  2. 17 Jan, 2018 8 commits
    • Russell King's avatar
      ARM: net: bpf: clarify tail_call index · 091f0248
      Russell King authored
      As per 90caccdd ("bpf: fix bpf_tail_call() x64 JIT"), the index used
      for array lookup is defined to be 32-bit wide. Update a misleading
      comment that suggests it is 64-bit wide.
      Fixes: 39c13c20
       ("arm: eBPF JIT compiler")
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
    • Russell King's avatar
      ARM: net: bpf: fix LDX instructions · ec19e02b
      Russell King authored
      When the source and destination register are identical, our JIT does not
      generate correct code, which leads to kernel oopses.
      Fix this by (a) generating more efficient code, and (b) making use of
      the temporary earlier if we will overwrite the address register.
      Fixes: 39c13c20
       ("arm: eBPF JIT compiler")
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
    • Russell King's avatar
      ARM: net: bpf: fix register saving · 02088d9b
      Russell King authored
      When an eBPF program tail-calls another eBPF program, it enters it after
      the prologue to avoid having complex stack manipulations.  This can lead
      to kernel oopses, and similar.
      Resolve this by always using a fixed stack layout, a CPU register frame
      pointer, and using this when reloading registers before returning.
      Fixes: 39c13c20
       ("arm: eBPF JIT compiler")
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
    • Russell King's avatar
      ARM: net: bpf: correct stack layout documentation · 0005e55a
      Russell King authored
      The stack layout documentation incorrectly suggests that the BPF JIT
      scratch space starts immediately below BPF_FP. This is not correct,
      so let's fix the documentation to reflect reality.
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
    • Russell King's avatar
      ARM: net: bpf: move stack documentation · 70ec3a6c
      Russell King authored
      Move the stack documentation towards the top of the file, where it's
      relevant for things like the register layout.
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
    • Russell King's avatar
      ARM: net: bpf: fix stack alignment · d1220efd
      Russell King authored
      As per 2dede2d8 ("ARM EABI: stack pointer must be 64-bit aligned
      after a CPU exception") the stack should be aligned to a 64-bit boundary
      on EABI systems.  Ensure that the eBPF JIT appropraitely aligns the
      Fixes: 39c13c20
       ("arm: eBPF JIT compiler")
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
    • Russell King's avatar
      ARM: net: bpf: fix tail call jumps · f4483f2c
      Russell King authored
      When a tail call fails, it is documented that the tail call should
      continue execution at the following instruction.  An example tail call
      sequence is:
        12: (85) call bpf_tail_call#12
        13: (b7) r0 = 0
        14: (95) exit
      The ARM assembler for the tail call in this case ends up branching to
      instruction 14 instead of instruction 13, resulting in the BPF filter
      returning a non-zero value:
        178:	ldr	r8, [sp, #588]	; insn 12
        17c:	ldr	r6, [r8, r6]
        180:	ldr	r8, [sp, #580]
        184:	cmp	r8, r6
        188:	bcs	0x1e8
        18c:	ldr	r6, [sp, #524]
        190:	ldr	r7, [sp, #528]
        194:	cmp	r7, #0
        198:	cmpeq	r6, #32
        19c:	bhi	0x1e8
        1a0:	adds	r6, r6, #1
        1a4:	adc	r7, r7, #0
        1a8:	str	r6, [sp, #524]
        1ac:	str	r7, [sp, #528]
        1b0:	mov	r6, #104
        1b4:	ldr	r8, [sp, #588]
        1b8:	add	r6, r8, r6
        1bc:	ldr	r8, [sp, #580]
        1c0:	lsl	r7, r8, #2
        1c4:	ldr	r6, [r6, r7]
        1c8:	cmp	r6, #0
        1cc:	beq	0x1e8
        1d0:	mov	r8, #32
        1d4:	ldr	r6, [r6, r8]
        1d8:	add	r6, r6, #44
        1dc:	bx	r6
        1e0:	mov	r0, #0		; insn 13
        1e4:	mov	r1, #0
        1e8:	add	sp, sp, #596	; insn 14
        1ec:	pop	{r4, r5, r6, r7, r8, sl, pc}
      For other sequences, the tail call could end up branching midway through
      the following BPF instructions, or maybe off the end of the function,
      leading to unknown behaviours.
      Fixes: 39c13c20
       ("arm: eBPF JIT compiler")
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
    • Russell King's avatar
      ARM: net: bpf: avoid 'bx' instruction on non-Thumb capable CPUs · e9062481
      Russell King authored
      Avoid the 'bx' instruction on CPUs that have no support for Thumb and
      thus do not implement this instruction by moving the generation of this
      opcode to a separate function that selects between:
      	bx	reg
      	mov	pc, reg
      according to the capabilities of the CPU.
      Fixes: 39c13c20
       ("arm: eBPF JIT compiler")
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
  3. 06 Jan, 2018 1 commit
  4. 05 Jan, 2018 3 commits
    • Mathieu Malaterre's avatar
      ARM: dts: da850-lcdk: Remove leading 0x and 0s from unit address · 7669b122
      Mathieu Malaterre authored
      Improve the DTS files by removing all the leading "0x" and zeros to fix the
      following dtc warnings:
      Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
      Warning (unit_address_format): Node /XXX unit name should not have leading 0s
      Converted using the following command:
      find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -i -e "s/@\([0-9a-fA-FxX\.;:#]+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 {/g" -e "s/@0+\(.*\) {/@\1 {/g" {} +^C
      For simplicity, two sed expressions were used to solve each warnings separately.
      To make the regex expression more robust a few other issues were resolved,
      namely setting unit-address to lower case, and adding a whitespace before the
      the opening curly brace:
      This will solve as a side effect warning:
      Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
      This is a follow up to commit 4c9847b7
       ("dt-bindings: Remove leading 0x from bindings notation")
      Reported-by: default avatarDavid Daney <ddaney@caviumnetworks.com>
      Suggested-by: default avatarRob Herring <robh@kernel.org>
      Signed-off-by: default avatarMathieu Malaterre <malat@debian.org>
      Signed-off-by: default avatarSekhar Nori <nsekhar@ti.com>
    • Thomas Petazzoni's avatar
      ARM: dts: kirkwood: fix pin-muxing of MPP7 on OpenBlocks A7 · 56aeb07c
      Thomas Petazzoni authored
      MPP7 is currently muxed as "gpio", but this function doesn't exist for
      MPP7, only "gpo" is available. This causes the following error:
      kirkwood-pinctrl f1010000.pin-controller: unsupported function gpio on pin mpp7
      pinctrl core: failed to register map default (6): invalid type given
      kirkwood-pinctrl f1010000.pin-controller: error claiming hogs: -22
      kirkwood-pinctrl f1010000.pin-controller: could not claim hogs: -22
      kirkwood-pinctrl f1010000.pin-controller: unable to register pinctrl driver
      kirkwood-pinctrl: probe of f1010000.pin-controller failed with error -22
      So the pinctrl driver is not probed, all device drivers (including the
      UART driver) do a -EPROBE_DEFER, and therefore the system doesn't
      really boot (well, it boots, but with no UART, and no devices that
      require pin-muxing).
      Back when the Device Tree file for this board was introduced, the
      definition was already wrong. The pinctrl driver also always described
      as "gpo" this function for MPP7. However, between Linux 4.10 and 4.11,
      a hog pin failing to be muxed was turned from a simple warning to a
      hard error that caused the entire pinctrl driver probe to bail
      out. This is probably the result of commit 61187142 ("pinctrl:
      core: Fix pinctrl_register_and_init() with pinctrl_enable()").
      This commit fixes the Device Tree to use the proper "gpo" function for
      MPP7, which fixes the boot of OpenBlocks A7, which was broken since
      Linux 4.11.
      Fixes: f24b56cb
       ("ARM: kirkwood: add support for OpenBlocks A7 platform")
      Cc: <stable@vger.kernel.org>
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
    • Andrew Morton's avatar
      kernel/exit.c: export abort() to modules · dc8635b7
      Andrew Morton authored
      gcc -fisolate-erroneous-paths-dereference can generate calls to abort()
      from modular code too.
      [arnd@arndb.de: drop duplicate exports of abort()]
        Link: http://lkml.kernel.org/r/20180102103311.706364-1-arnd@arndb.de
      Reported-by: default avatarVineet Gupta <Vineet.Gupta1@synopsys.com>
      Cc: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
      Cc: Russell King <rmk+kernel@armlinux.org.uk>
      Cc: Jose Abreu <Jose.Abreu@synopsys.com>
      Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
  5. 22 Dec, 2017 2 commits
    • Arnd Bergmann's avatar
      ARM: dts: tango4: remove bogus interrupt-controller property · fbd90b4c
      Arnd Bergmann authored
      dtc points out that the parent node of the interrupt controllers is not
      actually an interrupt controller itself, and lacks an #interrupt-cells
      arch/arm/boot/dts/tango4-vantage-1172.dtb: Warning (interrupts_property): Missing #interrupt-cells in interrupt-parent /soc/interrupt-controller@6e000
      This removes the annotation.
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
    • Arnd Bergmann's avatar
      ARM: dts: ls1021a: fix incorrect clock references · 506e8a91
      Arnd Bergmann authored
      dtc warns about two 'clocks' properties that have an extraneous '1'
      at the end:
      arch/arm/boot/dts/ls1021a-qds.dtb: Warning (clocks_property): arch/arm/boot/dts/ls1021a-twr.dtb: Warning (clocks_property): Property 'clocks', cell 1 is not a phandle reference in /soc/i2c@2180000/mux@77/i2c@4/sgtl5000@2a
      arch/arm/boot/dts/ls1021a-qds.dtb: Warning (clocks_property): Missing property '#clock-cells' in node /soc/interrupt-controller@1400000 or bad phandle (referred from /soc/i2c@2180000/mux@77/i2c@4/sgtl5000@2a:clocks[1])
      Property 'clocks', cell 1 is not a phandle reference in /soc/i2c@2190000/sgtl5000@a
      arch/arm/boot/dts/ls1021a-twr.dtb: Warning (clocks_property): Missing property '#clock-cells' in node /soc/interrupt-controller@1400000 or bad phandle (referred from /soc/i2c@2190000/sgtl5000@a:clocks[1])
      The clocks that get referenced here are fixed-rate, so they do not
      take any argument, and dtc interprets the next cell as a phandle, which
      is invalid.
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
  6. 21 Dec, 2017 2 commits
  7. 19 Dec, 2017 1 commit
  8. 17 Dec, 2017 1 commit
  9. 13 Dec, 2017 1 commit
  10. 08 Dec, 2017 1 commit
  11. 07 Dec, 2017 5 commits
  12. 05 Dec, 2017 4 commits
  13. 04 Dec, 2017 2 commits
  14. 03 Dec, 2017 1 commit
  15. 02 Dec, 2017 1 commit
  16. 30 Nov, 2017 4 commits
  17. 29 Nov, 2017 2 commits