Commit 49a695ba authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'powerpc-4.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

Pull powerpc updates from Michael Ellerman:
 "Notable changes:

   - Support for 4PB user address space on 64-bit, opt-in via mmap().

   - Removal of POWER4 support, which was accidentally broken in 2016
     and no one noticed, and blocked use of some modern instructions.

   - Workarounds so that the hypervisor can enable Transactional Memory
     on Power9.

   - A series to disable the DAWR (Data Address Watchpoint Register) on
     Power9.

   - More information displayed in the meltdown/spectre_v1/v2 sysfs
     files.

   - A vpermxor (Power8 Altivec) implementation for the raid6 Q
     Syndrome.

   - A big series to make the allocation of our pacas (per cpu area),
     kernel page tables, and per-cpu stacks NUMA aware when using the
     Radix MMU on Power9.

  And as usual many fixes, reworks and cleanups.

  Thanks to: Aaro Koskinen, Alexandre Belloni, Alexey Kardashevskiy,
  Alistair Popple, Andy Shevchenko, Aneesh Kumar K.V, Anshuman Khandual,
  Balbir Singh, Benjamin Herrenschmidt, Christophe Leroy, Christophe
  Lombard, Cyril Bur, Daniel Axtens, Dave Young, Finn Thain, Frederic
  Barrat, Gustavo Romero, Horia Geantă, Jonathan Neuschäfer, Kees Cook,
  Larry Finger, Laurent Dufour, Laurent Vivier, Logan Gunthorpe,
  Madhavan Srinivasan, Mark Greer, Mark Hairgrove, Markus Elfring,
  Mathieu Malaterre, Matt Brown, Matt Evans, Mauricio Faria de Oliveira,
  Michael Neuling, Naveen N. Rao, Nicholas Piggin, Paul Mackerras,
  Philippe Bergheaud, Ram Pai, Rob Herring, Sam Bobroff, Segher
  Boessenkool, Simon Guo, Simon Horman, Stewart Smith, Sukadev
  Bhattiprolu, Suraj Jitindar Singh, Thiago Jung Bauermann, Vaibhav
  Jain, Vaidyanathan Srinivasan, Vasant Hegde, Wei Yongjun"

* tag 'powerpc-4.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (207 commits)
  powerpc/64s/idle: Fix restore of AMOR on POWER9 after deep sleep
  powerpc/64s: Fix POWER9 DD2.2 and above in cputable features
  powerpc/64s: Fix pkey support in dt_cpu_ftrs, add CPU_FTR_PKEY bit
  powerpc/64s: Fix dt_cpu_ftrs to have restore_cpu clear unwanted LPCR bits
  Revert "powerpc/64s/idle: POWER9 ESL=0 stop avoid save/restore overhead"
  powerpc: iomap.c: introduce io{read|write}64_{lo_hi|hi_lo}
  powerpc: io.h: move iomap.h include so that it can use readq/writeq defs
  cxl: Fix possible deadlock when processing page faults from cxllib
  powerpc/hw_breakpoint: Only disable hw breakpoint if cpu supports it
  powerpc/mm/radix: Update command line parsing for disable_radix
  powerpc/mm/radix: Parse disable_radix commandline correctly.
  powerpc/mm/hugetlb: initialize the pagetable cache correctly for hugetlb
  powerpc/mm/radix: Update pte fragment count from 16 to 256 on radix
  powerpc/mm/keys: Update documentation and remove unnecessary check
  powerpc/64s/idle: POWER9 ESL=0 stop avoid save/restore overhead
  powerpc/64s/idle: Consolidate power9_offline_stop()/power9_idle_stop()
  powerpc/powernv: Always stop secondaries before reboot/shutdown
  powerpc: hard disable irqs in smp_send_stop loop
  powerpc: use NMI IPI for smp_send_stop
  powerpc/powernv: Fix SMT4 forcing idle code
  ...
parents 299f89d5 c1b25a17
......@@ -141,11 +141,18 @@ AFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mabi=elfv1)
endif
CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mcmodel=medium,$(call cc-option,-mminimal-toc))
CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mno-pointers-to-nested-functions)
CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 $(MULTIPLEWORD)
CFLAGS-$(CONFIG_PPC32) += $(call cc-option,-mno-readonly-in-sdata)
ifeq ($(CONFIG_PPC_BOOK3S_64),y)
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,-mtune=power4)
CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=power4
ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),y)
CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=power8
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power9,-mtune=power8)
else
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,$(call cc-option,-mtune=power5))
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mcpu=power5,-mcpu=power4)
endif
else
CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=powerpc64
endif
......@@ -166,11 +173,11 @@ ifdef CONFIG_MPROFILE_KERNEL
endif
CFLAGS-$(CONFIG_CELL_CPU) += $(call cc-option,-mcpu=cell)
CFLAGS-$(CONFIG_POWER4_CPU) += $(call cc-option,-mcpu=power4)
CFLAGS-$(CONFIG_POWER5_CPU) += $(call cc-option,-mcpu=power5)
CFLAGS-$(CONFIG_POWER6_CPU) += $(call cc-option,-mcpu=power6)
CFLAGS-$(CONFIG_POWER7_CPU) += $(call cc-option,-mcpu=power7)
CFLAGS-$(CONFIG_POWER8_CPU) += $(call cc-option,-mcpu=power8)
CFLAGS-$(CONFIG_POWER9_CPU) += $(call cc-option,-mcpu=power9)
# Altivec option not allowed with e500mc64 in GCC.
ifeq ($(CONFIG_ALTIVEC),y)
......@@ -243,6 +250,7 @@ endif
cpu-as-$(CONFIG_4xx) += -Wa,-m405
cpu-as-$(CONFIG_ALTIVEC) += $(call as-option,-Wa$(comma)-maltivec)
cpu-as-$(CONFIG_E200) += -Wa,-me200
cpu-as-$(CONFIG_PPC_BOOK3S_64) += -Wa,-mpower4
KBUILD_AFLAGS += $(cpu-as-y)
KBUILD_CFLAGS += $(cpu-as-y)
......
......@@ -219,6 +219,6 @@
};
chosen {
linux,stdout-path = "/plb/opb/serial@ef600300";
stdout-path = "/plb/opb/serial@ef600300";
};
};
......@@ -178,6 +178,6 @@
};
chosen {
linux,stdout-path = &console;
stdout-path = &console;
};
};
......@@ -177,6 +177,6 @@
};
chosen {
linux,stdout-path = &console;
stdout-path = &console;
};
};
......@@ -410,6 +410,6 @@
};
chosen {
linux,stdout-path = &UART0;
stdout-path = &UART0;
};
};
......@@ -168,6 +168,6 @@
};
chosen {
linux,stdout-path = "/pci@80000000/isa@7/serial@3f8";
stdout-path = "/pci@80000000/isa@7/serial@3f8";
};
};
......@@ -304,7 +304,7 @@
chosen {
bootargs = "console=ttyS0,38400 root=/dev/mtdblock3 rootfstype=jffs2";
linux,stdout-path = &serial0;
stdout-path = &serial0;
};
};
......@@ -295,6 +295,6 @@
};
chosen {
linux,stdout-path = "/plb/opb/serial@ef600300";
stdout-path = "/plb/opb/serial@ef600300";
};
};
......@@ -361,6 +361,6 @@
};
};
chosen {
linux,stdout-path = &MPSC0;
stdout-path = &MPSC0;
};
};
......@@ -237,6 +237,6 @@
};
chosen {
linux,stdout-path = &UART0;
stdout-path = &UART0;
};
};
......@@ -78,7 +78,7 @@
};
rtc@56 {
compatible = "mc,rv3029c2";
compatible = "microcrystal,rv3029";
reg = <0x56>;
};
......
......@@ -332,6 +332,6 @@
};
chosen {
linux,stdout-path = "/plb/opb/serial@40000200";
stdout-path = "/plb/opb/serial@40000200";
};
};
......@@ -421,7 +421,7 @@
};
chosen {
linux,stdout-path = "/plb/opb/serial@ef600200";
stdout-path = "/plb/opb/serial@ef600200";
};
};
......@@ -225,6 +225,6 @@
};
chosen {
linux,stdout-path = "/plb/opb/serial@ef600300";
stdout-path = "/plb/opb/serial@ef600300";
};
};
......@@ -146,7 +146,7 @@
};
chosen {
linux,stdout-path = &serial0;
stdout-path = &serial0;
};
};
......
......@@ -607,7 +607,7 @@
};
chosen {
linux,stdout-path = "/plb/opb/serial@b0020000";
stdout-path = "/plb/opb/serial@b0020000";
bootargs = "console=ttyS0,115200 rw log_buf_len=32768 debug";
};
};
......@@ -191,6 +191,6 @@
};
chosen {
linux,stdout-path = "/tsi109@c0000000/serial@7808";
stdout-path = "/tsi109@c0000000/serial@7808";
};
};
......@@ -291,6 +291,6 @@
};
chosen {
linux,stdout-path = &UART0;
stdout-path = &UART0;
};
};
......@@ -442,6 +442,6 @@
};
chosen {
linux,stdout-path = "/plb/opb/serial@f0000200";
stdout-path = "/plb/opb/serial@f0000200";
};
};
......@@ -150,6 +150,6 @@
};
chosen {
linux,stdout-path = "/plb/opb/serial@40000200";
stdout-path = "/plb/opb/serial@40000200";
};
};
......@@ -111,6 +111,6 @@
};
chosen {
linux,stdout-path = "/plb/opb/serial@40000200";
stdout-path = "/plb/opb/serial@40000200";
};
};
......@@ -505,6 +505,6 @@
};
chosen {
linux,stdout-path = "/plb/opb/serial@f0000200";
stdout-path = "/plb/opb/serial@f0000200";
};
};
......@@ -222,6 +222,6 @@
};
chosen {
linux,stdout-path = "/plb/opb/serial@50001000";
stdout-path = "/plb/opb/serial@50001000";
};
};
......@@ -339,6 +339,6 @@
chosen {
linux,stdout-path = "/soc/cpm/serial@91a00";
stdout-path = "/soc/cpm/serial@91a00";
};
};
......@@ -25,7 +25,7 @@
};
chosen {
linux,stdout-path = &console;
stdout-path = &console;
};
cpus {
......
......@@ -262,6 +262,6 @@
};
chosen {
linux,stdout-path = "/soc/cpm/serial@11a00";
stdout-path = "/soc/cpm/serial@11a00";
};
};
......@@ -185,6 +185,6 @@
};
chosen {
linux,stdout-path = "/soc/cpm/serial@a80";
stdout-path = "/soc/cpm/serial@a80";
};
};
......@@ -227,6 +227,6 @@
};
chosen {
linux,stdout-path = "/soc/cpm/serial@a80";
stdout-path = "/soc/cpm/serial@a80";
};
};
......@@ -179,7 +179,7 @@
};
chosen {
linux,stdout-path = &serial0;
stdout-path = &serial0;
};
};
......@@ -309,6 +309,6 @@
};
};
chosen {
linux,stdout-path = "/plb/opb/serial@ef600200";
stdout-path = "/plb/opb/serial@ef600200";
};
};
......@@ -242,6 +242,6 @@
};
chosen {
linux,stdout-path = "/soc/cpm/serial@11a00";
stdout-path = "/soc/cpm/serial@11a00";
};
};
......@@ -344,7 +344,7 @@
};
chosen {
linux,stdout-path = "/plb/opb/serial@ef600300";
stdout-path = "/plb/opb/serial@ef600300";
bootargs = "console=ttyS0,115200";
};
};
......@@ -381,7 +381,7 @@
chosen {
linux,stdout-path = "/plb/opb/serial@ef600200";
stdout-path = "/plb/opb/serial@ef600200";
};
};
......@@ -288,6 +288,6 @@
};
chosen {
linux,stdout-path = "/plb/opb/serial@ef600300";
stdout-path = "/plb/opb/serial@ef600300";
};
};
......@@ -406,7 +406,7 @@
};
chosen {
linux,stdout-path = "/plb/opb/serial@ef600300";
stdout-path = "/plb/opb/serial@ef600300";
bootargs = "console=ttyS0,115200";
};
};
......@@ -137,6 +137,6 @@
};
chosen {
linux,stdout-path = &serial0;
stdout-path = &serial0;
};
};
......@@ -422,6 +422,6 @@
};
chosen {
linux,stdout-path = "/plb/opb/serial@40000300";
stdout-path = "/plb/opb/serial@40000300";
};
};
......@@ -32,7 +32,7 @@
} ;
chosen {
bootargs = "console=ttyS0 root=/dev/ram";
linux,stdout-path = &RS232_Uart_1;
stdout-path = &RS232_Uart_1;
} ;
cpus {
#address-cells = <1>;
......
......@@ -26,7 +26,7 @@
} ;
chosen {
bootargs = "console=ttyS0 root=/dev/ram";
linux,stdout-path = "/plb@0/serial@83e00000";
stdout-path = "/plb@0/serial@83e00000";
} ;
cpus {
#address-cells = <1>;
......
......@@ -241,6 +241,6 @@
};
chosen {
linux,stdout-path = "/plb/opb/serial@ef600300";
stdout-path = "/plb/opb/serial@ef600300";
};
};
......@@ -304,6 +304,6 @@
};
chosen {
linux,stdout-path = "/plb/opb/serial@ef600300";
stdout-path = "/plb/opb/serial@ef600300";
};
};
......@@ -13,6 +13,7 @@
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
/*
* This is commented-out for now.
......@@ -176,6 +177,15 @@
compatible = "nintendo,hollywood-gpio";
reg = <0x0d8000c0 0x40>;
gpio-controller;
ngpios = <24>;
gpio-line-names =
"POWER", "SHUTDOWN", "FAN", "DC_DC",
"DI_SPIN", "SLOT_LED", "EJECT_BTN", "SLOT_IN",
"SENSOR_BAR", "DO_EJECT", "EEP_CS", "EEP_CLK",
"EEP_MOSI", "EEP_MISO", "AVE_SCL", "AVE_SDA",
"DEBUG0", "DEBUG1", "DEBUG2", "DEBUG3",
"DEBUG4", "DEBUG5", "DEBUG6", "DEBUG7";
/*
* This is commented out while a standard binding
......@@ -214,5 +224,16 @@
interrupts = <2>;
};
};
gpio-leds {
compatible = "gpio-leds";
/* This is the blue LED in the disk drive slot */
drive-slot {
label = "wii:blue:drive_slot";
gpios = <&GPIO 5 GPIO_ACTIVE_HIGH>;
panic-indicator;
};
};
};
......@@ -503,6 +503,6 @@
/* Needed for dtbImage boot wrapper compatibility */
chosen {
linux,stdout-path = &serial0;
stdout-path = &serial0;
};
};
......@@ -327,6 +327,6 @@
};
chosen {
linux,stdout-path = "/plb/opb/serial@ef600300";
stdout-path = "/plb/opb/serial@ef600300";
};
};
......@@ -7,8 +7,6 @@
#include "of.h"
typedef u32 uint32_t;
typedef u64 uint64_t;
typedef unsigned long uintptr_t;
typedef __be16 fdt16_t;
......
......@@ -62,6 +62,7 @@ void RunModeException(struct pt_regs *regs);
void single_step_exception(struct pt_regs *regs);
void program_check_exception(struct pt_regs *regs);
void alignment_exception(struct pt_regs *regs);
void slb_miss_bad_addr(struct pt_regs *regs);
void StackOverflow(struct pt_regs *regs);
void nonrecoverable_exception(struct pt_regs *regs);
void kernel_fp_unavailable_exception(struct pt_regs *regs);
......@@ -88,7 +89,18 @@ int sys_swapcontext(struct ucontext __user *old_ctx,
long sys_swapcontext(struct ucontext __user *old_ctx,
struct ucontext __user *new_ctx,
int ctx_size, int r6, int r7, int r8, struct pt_regs *regs);
int sys_debug_setcontext(struct ucontext __user *ctx,
int ndbg, struct sig_dbg_op __user *dbg,
int r6, int r7, int r8,
struct pt_regs *regs);
int
ppc_select(int n, fd_set __user *inp, fd_set __user *outp, fd_set __user *exp, struct timeval __user *tvp);
unsigned long __init early_init(unsigned long dt_ptr);
void __init machine_init(u64 dt_ptr);
#endif
long ppc_fadvise64_64(int fd, int advice, u32 offset_high, u32 offset_low,
u32 len_high, u32 len_low);
long sys_switch_endian(void);
notrace unsigned int __check_irq_replay(void);
void notrace restore_interrupts(void);
......@@ -126,4 +138,7 @@ extern int __ucmpdi2(u64, u64);
void _mcount(void);
unsigned long prepare_ftrace_return(unsigned long parent, unsigned long ip);
void pnv_power9_force_smt4_catch(void);
void pnv_power9_force_smt4_release(void);
#endif /* _ASM_POWERPC_ASM_PROTOTYPES_H */
......@@ -35,7 +35,8 @@
#define rmb() __asm__ __volatile__ ("sync" : : : "memory")
#define wmb() __asm__ __volatile__ ("sync" : : : "memory")
#ifdef __SUBARCH_HAS_LWSYNC
/* The sub-arch has lwsync */
#if defined(__powerpc64__) || defined(CONFIG_PPC_E500MC)
# define SMPWMB LWSYNC
#else
# define SMPWMB eieio
......
......@@ -11,6 +11,12 @@
#define H_PUD_INDEX_SIZE 9
#define H_PGD_INDEX_SIZE 9
/*
* Each context is 512TB. But on 4k we restrict our max TASK size to 64TB
* Hence also limit max EA bits to 64TB.
*/
#define MAX_EA_BITS_PER_CONTEXT 46
#ifndef __ASSEMBLY__
#define H_PTE_TABLE_SIZE (sizeof(pte_t) << H_PTE_INDEX_SIZE)
#define H_PMD_TABLE_SIZE (sizeof(pmd_t) << H_PMD_INDEX_SIZE)
......@@ -34,6 +40,14 @@
#define H_PAGE_COMBO 0x0
#define H_PTE_FRAG_NR 0
#define H_PTE_FRAG_SIZE_SHIFT 0
/* memory key bits, only 8 keys supported */
#define H_PTE_PKEY_BIT0 0
#define H_PTE_PKEY_BIT1 0
#define H_PTE_PKEY_BIT2 _RPAGE_RSV3
#define H_PTE_PKEY_BIT3 _RPAGE_RSV4
#define H_PTE_PKEY_BIT4 _RPAGE_RSV5
/*
* On all 4K setups, remap_4k_pfn() equates to remap_pfn_range()
*/
......
......@@ -4,9 +4,15 @@
#define H_PTE_INDEX_SIZE 8
#define H_PMD_INDEX_SIZE 10
#define H_PUD_INDEX_SIZE 7
#define H_PUD_INDEX_SIZE 10
#define H_PGD_INDEX_SIZE 8
/*
* Each context is 512TB size. SLB miss for first context/default context
* is handled in the hotpath.
*/
#define MAX_EA_BITS_PER_CONTEXT 49
/*
* 64k aligned address free up few of the lower bits of RPN for us
* We steal that here. For more deatils look at pte_pfn/pfn_pte()
......@@ -16,6 +22,13 @@
#define H_PAGE_BUSY _RPAGE_RPN44 /* software: PTE & hash are busy */
#define H_PAGE_HASHPTE _RPAGE_RPN43 /* PTE has associated HPTE */
/* memory key bits. */
#define H_PTE_PKEY_BIT0 _RPAGE_RSV1
#define H_PTE_PKEY_BIT1 _RPAGE_RSV2
#define H_PTE_PKEY_BIT2 _RPAGE_RSV3
#define H_PTE_PKEY_BIT3 _RPAGE_RSV4
#define H_PTE_PKEY_BIT4 _RPAGE_RSV5
/*
* We need to differentiate between explicit huge page and THP huge
* page, since THP huge page also need to track real subpage details
......@@ -24,16 +37,14 @@
/* PTE flags to conserve for HPTE identification */
#define _PAGE_HPTEFLAGS (H_PAGE_BUSY | H_PAGE_HASHPTE | H_PAGE_COMBO)
/*
* we support 16 fragments per PTE page of 64K size.
*/
#define H_PTE_FRAG_NR 16
/*
* We use a 2K PTE page fragment and another 2K for storing
* real_pte_t hash index
* 8 bytes per each pte entry and another 8 bytes for storing
* slot details.
*/
#define H_PTE_FRAG_SIZE_SHIFT 12
#define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT)
#define H_PTE_FRAG_SIZE_SHIFT (H_PTE_INDEX_SIZE + 3 + 1)
#define H_PTE_FRAG_NR (PAGE_SIZE >> H_PTE_FRAG_SIZE_SHIFT)
#ifndef __ASSEMBLY__
#include <asm/errno.h>
......
......@@ -212,7 +212,7 @@ extern int __meminit hash__vmemmap_create_mapping(unsigned long start,
extern void hash__vmemmap_remove_mapping(unsigned long start,
unsigned long page_size);
int hash__create_section_mapping(unsigned long start, unsigned long end);
int hash__create_section_mapping(unsigned long start, unsigned long end, int nid);
int hash__remove_section_mapping(unsigned long start, unsigned long end);
#endif /* !__ASSEMBLY__ */
......
......@@ -80,8 +80,29 @@ struct spinlock;
/* Maximum possible number of NPUs in a system. */
#define NV_MAX_NPUS 8
/*
* One bit per slice. We have lower slices which cover 256MB segments
* upto 4G range. That gets us 16 low slices. For the rest we track slices
* in 1TB size.
*/
struct slice_mask {
u64 low_slices;
DECLARE_BITMAP(high_slices, SLICE_NUM_HIGH);
};
typedef struct {
mm_context_id_t id;
union {
/*
* We use id as the PIDR content for radix. On hash we can use
* more than one id. The extended ids are used when we start
* having address above 512TB. We allocate one extended id