1. 27 Dec, 2019 2 commits
    • Jagan Teki's avatar
      spi: rk: Limit transfers to (64K - 1) bytes · dbbdc81c
      Jagan Teki authored
      The Rockchip SPI controller's length register only supports 16-bits,
      yielding a maximum length of 64KiB (the CTRLR1 register holds "length -
      1"). Trying to transfer more than that (e.g., with a large SPI flash
      read) will cause the driver to hang.
      Now, it seems that while theoretically we should be able to program
      CTRLR1 with 0xffff, and get a 64KiB transfer, but that also seems to
      cause the core to choke, so stick with a maximum of 64K - 1 bytes --
      i.e., 0xffff.
      Note, that the size is further divided into 'minus 1' while writing
      into CTRLR1.
      This change fixed two different read issues,
      1. sf read failure when with > 0x10000
      2. Boot from SPI flash failed during spi_flash_read call in
      Observed and Tested in
      - Rockpro64 with Gigadevice flash
      - ROC-RK3399-PC with Winbond flash
      Signed-off-by: default avatarJagan Teki <jagan@amarulasolutions.com>
      Reviewed-by: default avatarKever Yang <kever.yang@rock-chips.com>
    • Vignesh Raghavendra's avatar
      mtd: spi-nor-core: Fix static checker warnings · cb56caac
      Vignesh Raghavendra authored
      Static checker warns 'ret' variable may be used uninitialized in
      spi_nor_erase() and spi_nor_write() in case of zero length requests.
      Fix these warnings by checking for zero length requests and returning
      Reported-by: default avatarDan Murphy <dmurphy@ti.com>
      Signed-off-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
  2. 18 Dec, 2019 5 commits
  3. 16 Dec, 2019 1 commit
  4. 14 Dec, 2019 1 commit
  5. 13 Dec, 2019 7 commits
  6. 11 Dec, 2019 7 commits
  7. 10 Dec, 2019 17 commits