Commit ae40f5e1 authored by Liu Ying's avatar Liu Ying

LF-95-4 drm/bridge: nwl-dsi: Correct register offsets for tx_ulps and pxl2dpi

Registers tx_ulps and pxl2dpi live in CSR region, so the offsets of
them should be calculated according to CSR region start address.
Without this patch, the offsets are calculated according to i.MX8QM
MIPI DSI subsystem start address or i.MX8QXP LVDS/MIPI DSI subsystem
start address.  This patch corrects the offsets.
Reviewed-by: default avatarSandor Yu <Sandor.yu@nxp.com>
Signed-off-by: default avatarLiu Ying <victor.liu@nxp.com>
parent 819ac28e
......@@ -1022,8 +1022,8 @@ static const struct nwl_dsi_platform_data imx8qm_dev = {
{ .id = NWL_DSI_CLK_BYPASS, .present = true },
{ .id = NWL_DSI_CLK_PIXEL, .present = true },
},
.reg_tx_ulps = 0x1000,
.reg_pxl2dpi = 0x1004,
.reg_tx_ulps = 0x00,
.reg_pxl2dpi = 0x04,
.max_instances = 2,
.shared_phy = false,
};
......@@ -1036,8 +1036,8 @@ static const struct nwl_dsi_platform_data imx8qx_dev = {
{ .id = NWL_DSI_CLK_BYPASS, .present = true },
{ .id = NWL_DSI_CLK_PIXEL, .present = true },
},
.reg_tx_ulps = 0x1030,
.reg_pxl2dpi = 0x1040,
.reg_tx_ulps = 0x30,
.reg_pxl2dpi = 0x40,
.max_instances = 2,
.shared_phy = true,
};
......
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