Commit d861183d authored by Tom Rini's avatar Tom Rini

Merge tag 'ti-v2020.04-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti

- DFU boot support for J721e
- I2C support for J721e
- GPIO support for J721e
- Android boot image updates on AM57XX
- OMAP watchdog fixes
parents 31a790be 4dd05933
......@@ -56,7 +56,7 @@ R: Sam Protsenko <joe.skb7@gmail.com>
S: Maintained
F: cmd/ab_select.c
F: common/android_ab.c
F: doc/android/ab.txt
F: doc/android/ab.rst
F: include/android_ab.h
F: test/py/tests/test_android/test_ab.py
......@@ -65,7 +65,7 @@ M: Igor Opaniuk <igor.opaniuk@gmail.com>
S: Maintained
F: cmd/avb.c
F: common/avb_verify.c
F: doc/android/avb2.txt
F: doc/android/avb2.rst
F: include/avb_verify.h
F: lib/libavb/
F: test/py/tests/test_android/test_avb.py
......
......@@ -337,3 +337,15 @@
&wkup_i2c0 {
u-boot,dm-spl;
};
&main_i2c0 {
u-boot,dm-spl;
};
&main_i2c0_pins_default {
u-boot,dm-spl;
};
&exp2 {
u-boot,dm-spl;
};
......@@ -107,6 +107,13 @@
J721E_IOPAD(0x214, PIN_OUTPUT, 4) /* (V4) MCAN1_TX.USB1_DRVVBUS */
>;
};
main_i2c0_pins_default: main-i2c0-pins-default {
pinctrl-single,pins = <
J721E_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (AC5) I2C0_SCL */
J721E_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (AA5) I2C0_SDA */
>;
};
};
&wkup_pmx0 {
......@@ -145,3 +152,23 @@
pinctrl-0 = <&wkup_i2c0_pins_default>;
clock-frequency = <400000>;
};
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
clock-frequency = <400000>;
exp1: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
};
exp2: gpio@22 {
compatible = "ti,tca6424";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
};
};
......@@ -200,6 +200,28 @@
clock-names = "fclk";
};
main_gpio0: gpio@600000 {
compatible = "ti,j721e-gpio", "ti,keystone-gpio";
reg = <0x0 0x00600000 0x0 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupts = <105 0 IRQ_TYPE_EDGE_RISING>,
<105 1 IRQ_TYPE_EDGE_RISING>,
<105 2 IRQ_TYPE_EDGE_RISING>,
<105 3 IRQ_TYPE_EDGE_RISING>,
<105 4 IRQ_TYPE_EDGE_RISING>,
<105 5 IRQ_TYPE_EDGE_RISING>,
<105 6 IRQ_TYPE_EDGE_RISING>,
<105 7 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
ti,ngpio = <128>;
ti,davinci-gpio-unbanked = <0>;
power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 105 0>;
clock-names = "gpio";
};
main_sdhci0: sdhci@4f80000 {
compatible = "ti,j721e-sdhci-8bit";
reg = <0x0 0x4f80000 0x0 0x1000>, <0x0 0x4f88000 0x0 0x400>;
......@@ -433,4 +455,81 @@
dma-coherent;
};
};
main_i2c0: i2c@2000000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x0 0x2000000 0x0 0x100>;
interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 187 0>;
power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>;
};
main_i2c1: i2c@2010000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x0 0x2010000 0x0 0x100>;
interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 188 0>;
power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
};
main_i2c2: i2c@2020000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x0 0x2020000 0x0 0x100>;
interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 189 0>;
power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>;
};
main_i2c3: i2c@2030000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x0 0x2030000 0x0 0x100>;
interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 190 0>;
power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
};
main_i2c4: i2c@2040000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x0 0x2040000 0x0 0x100>;
interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 191 0>;
power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
};
main_i2c5: i2c@2050000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x0 0x2050000 0x0 0x100>;
interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 192 0>;
power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
};
main_i2c6: i2c@2060000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x0 0x2060000 0x0 0x100>;
interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 193 0>;
power-domains = <&k3_pds 193 TI_SCI_PD_EXCLUSIVE>;
};
};
......@@ -144,4 +144,26 @@
assigned-clock-rates = <250000000>;
};
};
mcu_i2c0: i2c@40b00000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x0 0x40b00000 0x0 0x100>;
interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 194 0>;
power-domains = <&k3_pds 194 TI_SCI_PD_EXCLUSIVE>;
};
mcu_i2c1: i2c@40b10000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x0 0x40b10000 0x0 0x100>;
interrupts = <GIC_SPI 853 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 195 0>;
power-domains = <&k3_pds 195 TI_SCI_PD_EXCLUSIVE>;
};
};
......@@ -40,6 +40,13 @@
clock-frequency = <200000000>;
u-boot,dm-spl;
};
clk_19_2mhz: dummy_clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <19200000>;
u-boot,dm-spl;
};
};
&cbass_mcu_wakeup {
......@@ -133,6 +140,13 @@
J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */
>;
};
main_i2c0_pins_default: main-i2c0-pins-default {
pinctrl-single,pins = <
J721E_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (AC5) I2C0_SCL */
J721E_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (AA5) I2C0_SDA */
>;
};
};
&wkup_uart0 {
......@@ -207,4 +221,35 @@
u-boot,dm-spl;
};
&usbss0 {
/delete-property/ power-domains;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clocks = <&clk_19_2mhz>;
clock-names = "usb2_refclk";
pinctrl-names = "default";
pinctrl-0 = <&main_usbss0_pins_default>;
ti,vbus-divider;
};
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
clock-frequency = <400000>;
exp1: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
};
exp2: gpio@22 {
compatible = "ti,tca6424";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
};
};
#include "k3-j721e-common-proc-board-u-boot.dtsi"
......@@ -30,6 +30,16 @@
serial9 = &main_uart7;
serial10 = &main_uart8;
serial11 = &main_uart9;
i2c0 = &wkup_i2c0;
i2c1 = &mcu_i2c0;
i2c2 = &mcu_i2c1;
i2c3 = &main_i2c0;
i2c4 = &main_i2c1;
i2c5 = &main_i2c2;
i2c6 = &main_i2c3;
i2c7 = &main_i2c4;
i2c8 = &main_i2c5;
i2c9 = &main_i2c6;
};
chosen { };
......
......@@ -18,7 +18,7 @@
/* With BootMode B = 1 */
#define BOOT_DEVICE_MMC2 0x10
#define BOOT_DEVICE_MMC1 0x11
#define BOOT_DEVICE_USB 0x12
#define BOOT_DEVICE_DFU 0x12
#define BOOT_DEVICE_UFS 0x13
#define BOOT_DEVIE_GPMC 0x14
#define BOOT_DEVICE_PCIE 0x15
......
......@@ -11,6 +11,10 @@
#include <malloc.h>
#include <remoteproc.h>
#include <linux/soc/ti/ti_sci_protocol.h>
#include <g_dnl.h>
#include <usb.h>
#include <dfu.h>
#include <asm/arch/sys_proto.h>
#include "common.h"
......@@ -172,6 +176,27 @@ static void k3_sysfw_configure_using_fit(void *fit,
ret);
}
#if CONFIG_IS_ENABLED(DFU)
static int k3_sysfw_dfu_download(void *addr)
{
char dfu_str[50];
int ret;
sprintf(dfu_str, "sysfw.itb ram 0x%p 0x%x", addr,
CONFIG_K3_SYSFW_IMAGE_SIZE_MAX);
ret = dfu_config_entities(dfu_str, "ram", "0");
if (ret) {
dfu_free_entities();
goto exit;
}
run_usb_dnl_gadget(0, "usb_dnl_dfu");
exit:
dfu_free_entities();
return ret;
}
#endif
void k3_sysfw_loader(void (*config_pm_done_callback)(void))
{
struct spl_image_info spl_image = { 0 };
......@@ -235,6 +260,11 @@ void k3_sysfw_loader(void (*config_pm_done_callback)(void))
#endif
ret = spl_ymodem_load_image(&spl_image, &bootdev);
break;
#endif
#if CONFIG_IS_ENABLED(DFU)
case BOOT_DEVICE_DFU:
ret = k3_sysfw_dfu_download(sysfw_load_address);
break;
#endif
default:
panic("Loading SYSFW image from device %u not supported!\n",
......
......@@ -386,6 +386,16 @@ config CMD_ADTIMG
files should be merged in one dtb further, which needs to be passed to
the kernel, as part of a boot process.
config CMD_ABOOTIMG
bool "abootimg"
depends on ANDROID_BOOT_IMAGE
help
Android Boot Image manipulation commands. Allows one to extract
images contained in boot.img, like kernel, ramdisk, dtb, etc, and
obtain corresponding meta-information from boot.img.
See doc/android/boot-image.rst for details.
config CMD_ELF
bool "bootelf, bootvx"
default y
......@@ -870,7 +880,7 @@ config CMD_FASTBOOT
Android devices. Fastboot requires either the network stack
enabled or support for acting as a USB device.
See doc/android/fastboot.txt for more information.
See doc/android/fastboot.rst for more information.
config CMD_FLASH
bool "flinfo, erase, protect"
......
......@@ -48,6 +48,7 @@ ifdef CONFIG_POST
obj-$(CONFIG_CMD_DIAG) += diag.o
endif
obj-$(CONFIG_CMD_ADTIMG) += adtimg.o
obj-$(CONFIG_CMD_ABOOTIMG) += abootimg.o
obj-$(CONFIG_CMD_ECHO) += echo.o
obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o
obj-$(CONFIG_CMD_EEPROM) += eeprom.o
......
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2020
* Sam Protsenko <joe.skb7@gmail.com>
*/
#include <android_image.h>
#include <common.h>
#include <mapmem.h>
#define abootimg_addr() \
(_abootimg_addr == -1 ? image_load_addr : _abootimg_addr)
/* Please use abootimg_addr() macro to obtain the boot image address */
static ulong _abootimg_addr = -1;
static int abootimg_get_ver(int argc, char * const argv[])
{
const struct andr_img_hdr *hdr;
int res = CMD_RET_SUCCESS;
if (argc > 1)
return CMD_RET_USAGE;
hdr = map_sysmem(abootimg_addr(), sizeof(*hdr));
if (android_image_check_header(hdr)) {
printf("Error: Boot Image header is incorrect\n");
res = CMD_RET_FAILURE;
goto exit;
}
if (argc == 0)
printf("%u\n", hdr->header_version);
else
env_set_ulong(argv[0], hdr->header_version);
exit:
unmap_sysmem(hdr);
return res;
}
static int abootimg_get_recovery_dtbo(int argc, char * const argv[])
{
ulong addr;
u32 size;
if (argc > 2)
return CMD_RET_USAGE;
if (!android_image_get_dtbo(abootimg_addr(), &addr, &size))
return CMD_RET_FAILURE;
if (argc == 0) {
printf("%lx\n", addr);
} else {
env_set_hex(argv[0], addr);
if (argc == 2)
env_set_hex(argv[1], size);
}
return CMD_RET_SUCCESS;
}
static int abootimg_get_dtb_load_addr(int argc, char * const argv[])
{
const struct andr_img_hdr *hdr;
int res = CMD_RET_SUCCESS;
if (argc > 1)
return CMD_RET_USAGE;
hdr = map_sysmem(abootimg_addr(), sizeof(*hdr));
if (android_image_check_header(hdr)) {
printf("Error: Boot Image header is incorrect\n");
res = CMD_RET_FAILURE;
goto exit;
}
if (hdr->header_version < 2) {
printf("Error: header_version must be >= 2 for this\n");
res = CMD_RET_FAILURE;
goto exit;
}
if (argc == 0)
printf("%lx\n", (ulong)hdr->dtb_addr);
else
env_set_hex(argv[0], (ulong)hdr->dtb_addr);
exit:
unmap_sysmem(hdr);
return res;
}
static int abootimg_get_dtb_by_index(int argc, char * const argv[])
{
const char *index_str;
u32 num;
char *endp;
ulong addr;
u32 size;
if (argc < 1 || argc > 3)
return CMD_RET_USAGE;
index_str = argv[0] + strlen("--index=");
if (index_str[0] == '\0') {
printf("Error: Wrong index num\n");
return CMD_RET_FAILURE;
}
num = simple_strtoul(index_str, &endp, 0);
if (*endp != '\0') {
printf("Error: Wrong index num\n");
return CMD_RET_FAILURE;
}
if (!android_image_get_dtb_by_index(abootimg_addr(), num,
&addr, &size)) {
return CMD_RET_FAILURE;
}
if (argc == 1) {
printf("%lx\n", addr);
} else {
if (env_set_hex(argv[1], addr)) {
printf("Error: Can't set [addr_var]\n");
return CMD_RET_FAILURE;
}
if (argc == 3) {
if (env_set_hex(argv[2], size)) {
printf("Error: Can't set [size_var]\n");
return CMD_RET_FAILURE;
}
}
}
return CMD_RET_SUCCESS;
}
static int abootimg_get_dtb(int argc, char * const argv[])
{
if (argc < 1)
return CMD_RET_USAGE;
if (strstr(argv[0], "--index="))
return abootimg_get_dtb_by_index(argc, argv);
return CMD_RET_USAGE;
}
static int do_abootimg_addr(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
{
char *endp;
ulong img_addr;
if (argc != 2)
return CMD_RET_USAGE;
img_addr = simple_strtoul(argv[1], &endp, 16);
if (*endp != '\0') {
printf("Error: Wrong image address\n");
return CMD_RET_FAILURE;
}
_abootimg_addr = img_addr;
return CMD_RET_SUCCESS;
}
static int do_abootimg_get(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
{
const char *param;
if (argc < 2)
return CMD_RET_USAGE;
param = argv[1];
argc -= 2;
argv += 2;
if (!strcmp(param, "ver"))
return abootimg_get_ver(argc, argv);
else if (!strcmp(param, "recovery_dtbo"))
return abootimg_get_recovery_dtbo(argc, argv);
else if (!strcmp(param, "dtb_load_addr"))
return abootimg_get_dtb_load_addr(argc, argv);
else if (!strcmp(param, "dtb"))
return abootimg_get_dtb(argc, argv);
return CMD_RET_USAGE;
}
static int do_abootimg_dump(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
{
if (argc != 2)
return CMD_RET_USAGE;
if (!strcmp(argv[1], "dtb")) {
if (android_image_print_dtb_contents(abootimg_addr()))
return CMD_RET_FAILURE;
} else {
return CMD_RET_USAGE;
}
return CMD_RET_SUCCESS;
}
static cmd_tbl_t cmd_abootimg_sub[] = {
U_BOOT_CMD_MKENT(addr, 2, 1, do_abootimg_addr, "", ""),
U_BOOT_CMD_MKENT(dump, 2, 1, do_abootimg_dump, "", ""),
U_BOOT_CMD_MKENT(get, 5, 1, do_abootimg_get, "", ""),
};
static int do_abootimg(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
{
cmd_tbl_t *cp;
cp = find_cmd_tbl(argv[1], cmd_abootimg_sub,
ARRAY_SIZE(cmd_abootimg_sub));
/* Strip off leading 'abootimg' command argument */
argc--;
argv++;
if (!cp || argc > cp->maxargs)
return CMD_RET_USAGE;
if (flag == CMD_FLAG_REPEAT && !cmd_is_repeatable(cp))
return CMD_RET_SUCCESS;
return cp->cmd(cmdtp, flag, argc, argv);
}
U_BOOT_CMD(
abootimg, CONFIG_SYS_MAXARGS, 0, do_abootimg,
"manipulate Android Boot Image",