From 3c2c71e3eb8b259408e00d48fceacb77c38ec1af Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Wed, 5 Mar 2025 19:46:18 +0100
Subject: [PATCH] arm64: dts: rockchip: rock5bp: add dual-camera support
Add dual camera support. Note, that this is a HACK and should only
be used for testing purposes like this. Also this is untested right
now, since I do not yet have the hardware.
---
.../rockchip/rk3588-rock-5b-imx415-port2.dtsi | 156 ++++++++++++++++++
.../boot/dts/rockchip/rk3588-rock-5b-plus.dts | 2 +
2 files changed, 158 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-rock-5b-imx415-port2.dtsi
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-imx415-port2.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-imx415-port2.dtsi
new file mode 100644
index 0000000000000..73cb58705b66c
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-imx415-port2.dtsi
@@ -0,0 +1,156 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
+ * Adapted from the overlay for port1 using the 5B+ schematics
+ *
+ */
+
+/ {
+ compatible = "radxa,rock-5b-plus", "rockchip,rk3588";
+};
+
+&i2c4 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c4m1_xfer>;
+
+ imx415_2: imx415@1a {
+ status = "okay";
+ compatible = "sony,imx415";
+ reg = <0x1a>;
+ clocks = <&cru CLK_MIPI_CAMARAOUT_M4>;
+ clock-names = "xvclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mipim0_camera4_clk>;
+ power-domains = <&power RK3588_PD_VI>;
+ pwdn-gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>;
+ rockchip,camera-module-index = <0>;
+ rockchip,camera-module-facing = "back";
+ rockchip,camera-module-name = "RADXA-CAMERA-4K";
+ rockchip,camera-module-lens-name = "DEFAULT";
+ port {
+ imx415_2_out0: endpoint {
+ remote-endpoint = <&mipidphy4_in_ucam0>;
+ data-lanes = <1 2 3 4>;
+ };
+ };
+ };
+};
+
+&csi2_dphy1_hw {
+ status = "okay";
+};
+
+&csi2_dphy3 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mipidphy4_in_ucam0: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&imx415_2_out0>;
+ data-lanes = <1 2 3 4>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csidphy4_out: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&mipi4_csi2_input>;
+ };
+ };
+ };
+};
+
+&mipi4_csi2 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mipi4_csi2_input: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&csidphy4_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mipi4_csi2_output: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&cif_mipi4_in0>;
+ };
+ };
+ };
+};
+
+&rkcif {
+ status = "okay";
+};
+
+&rkcif_mipi_lvds4 {
+ status = "okay";
+
+ port {
+ cif_mipi4_in0: endpoint {
+ remote-endpoint = <&mipi4_csi2_output>;
+ };
+ };
+};
+
+&rkcif_mipi_lvds4_sditf {
+ status = "okay";
+
+ port {
+ mipi_lvds4_sditf: endpoint {
+ remote-endpoint = <&isp1_vir1>;
+ };
+ };
+};
+
+&rkcif_mmu {
+ status = "okay";
+};
+
+&rkisp1 {
+ status = "okay";
+};
+
+&isp1_mmu {
+ status = "okay";
+};
+
+&rkisp1_vir1 {
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ isp1_vir1: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&mipi_lvds4_sditf>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
index b42c0c267c8f8..e1a653a9e7cbc 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
@@ -19,6 +19,8 @@
#include "rk3588.dtsi"
#include "rk3588-rk806-single.dtsi"
#include "rk3588-linux.dtsi"
+#include "rk3588-rock-5b-imx415.dtsi"
+#include "rk3588-rock-5b-imx415-port2.dtsi"
/ {
model = "Radxa ROCK 5B+";
--
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