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Vitaly Andrianov authored
This patch adds DDR3 ECC error interrupt handler support for Keystone 2 devices. This is a simple uncorrectable error handler that causes kernel panic if the error ECC 2 bit error interrupt is raised. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
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