i965: Fix some oddities in FB_WRITE register width and execution size.
Previously, we generated this for FB writes in SIMD16 mode: load_payload(16) vgrf5@8+0.0:F, vgrf1:F, vgrf2:F, vgrf3:F, vgrf4:F fb_write(8) (null):UD, vgrf5@8+0.0:F 1sthalf The LOAD_PAYLOAD's destination had its register width set to 8, and the FB_WRITE had its execution size set to 8. This seems wrong, and while it probably doesn't affect anything, we should fix it. Signed-off-by: Kenneth Graunke <firstname.lastname@example.org> Reviewed-by: Matt Turner <email@example.com> Reviewed-by: Jason Ekstrand <firstname.lastname@example.org>
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