Commit 8e70a58a authored by Marek Olšák's avatar Marek Olšák

radeonsi: fix a critical SI hang since PIPELINESTAT_START/STOP was added

For some reason unknown to me, SI hangs if the event is written after
CONTEXT_CONTROL.
parent 95d622e1
......@@ -155,7 +155,8 @@ void si_begin_new_cs(struct si_context *ctx)
SI_CONTEXT_INV_VMEM_L1 |
SI_CONTEXT_INV_GLOBAL_L2 |
SI_CONTEXT_INV_SMEM_L1 |
SI_CONTEXT_INV_ICACHE;
SI_CONTEXT_INV_ICACHE |
R600_CONTEXT_START_PIPELINE_STATS;
/* set all valid group as dirty so they get reemited on
* next draw command
......
......@@ -3817,14 +3817,6 @@ static void si_init_config(struct si_context *sctx)
si_pm4_cmd_add(pm4, 0x80000000);
si_pm4_cmd_end(pm4, false);
/* This enables pipeline stat & streamout queries.
* They are only disabled by blits.
*/
si_pm4_cmd_begin(pm4, PKT3_EVENT_WRITE);
si_pm4_cmd_add(pm4, EVENT_TYPE(V_028A90_PIPELINESTAT_START) |
EVENT_INDEX(0));
si_pm4_cmd_end(pm4, false);
si_pm4_set_reg(pm4, R_028A18_VGT_HOS_MAX_TESS_LEVEL, fui(64));
si_pm4_set_reg(pm4, R_028A1C_VGT_HOS_MIN_TESS_LEVEL, fui(0));
......
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