• Samuel Iglesias Gonsálvez's avatar
    i965/fs/generator: add new opcode to set float controls modes in control register · 8a6507b6
    Samuel Iglesias Gonsálvez authored
    Before this commit, we had only FPRoundingMode decoration (the per
    instruction one) that is applied during the SPIR-V handling. In
    vtn_alu we find out the rounding mode, and generate the code
    accordingly that later will be used to look for the respective
    nir_op_f2f16_{rtz,rtne}.
    
    Per-instruction gets prioritized because we make them explicit
    conversions (with RTZ or RTNE nir opcodes) and they will override the
    default execution mode defined with float controls. However, we need
    to come back to the mode defined by float controls after the execution
    of the FP Rounding instruction.
    
    Therefore, the new SHADER_OPCODE_FLOAT_CONTROL_MODE opcode will be
    used to set the default rounding mode and denorms treatment in the
    whole shader while the pre-existent SHADER_OPCODE_RND_MODE, will be
    used as prioritized rounding mode in a per-instruction basis.
    
    v2:
    - Fix bug in defining BRW_CR0_FP_MODE_MASK.
    
    v3:
    - Update comment (Caio).
    
    v4:
    - Split the patch into the helper and the new opcode (this
      one) (Caio).
    
    v5:
    - Add an explanation on the actual purpose and priority of the newly
      introduced opcode in the commit log (Caio).
    Signed-off-by: default avatarSamuel Iglesias Gonsálvez <siglesias@igalia.com>
    Reviewed-by: default avatarCaio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
    8a6507b6