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Ian Romanick authored
Since dd7135d5 ("intel/compiler: Use the flrp lowering pass for all stages on Gen4 and Gen5"), it's not possible to get to this function on GPUs that don't have a LRP instruction. Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6826>
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