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H.J. Lu authored
Intel Control-flow Enforcement Technology (CET): https://software.intel.com/en-us/articles/intel-sdm contains shadow stack (SHSTK) and indirect branch tracking (IBT). When IBT is enabled, all indirect branch targets must start with ENDBR instruction which is a NOP on non-CET processors. Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2538 Acked-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Ben Widawsky <ben.widawsky@intel.com> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3865> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3865>
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