Commit 349efdbb authored by Brian Paul's avatar Brian Paul

svga: fix PS output register setup regression

Fixes glean fragProg1 regression caused by commit b9f68d92
(implement TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS).  This bug
only appears when the fragment shader emits fragment.Z before
color outputs.  The bug was caused by confusion between register
indexes and semantic indexes.

Also added some comments to better explain register indexing.
Reviewed-by: default avatarJose Fonseca <jfonseca@vmware.com>
parent c6b6916b
......@@ -319,6 +319,7 @@ ps30_input(struct svga_shader_emitter *emit,
/**
* Process a PS output declaration.
* Note that we don't actually emit a SVGA3DOpDcl for PS outputs.
* \idx register index, such as OUT[2] (not semantic index)
*/
static boolean
ps30_output(struct svga_shader_emitter *emit,
......@@ -344,9 +345,9 @@ ps30_output(struct svga_shader_emitter *emit,
if (semantic.Index == 0) {
unsigned i;
for (i = 0; i < emit->key.fkey.write_color0_to_n_cbufs; i++) {
emit->output_map[i] = dst_register(SVGA3DREG_TEMP,
emit->output_map[idx+i] = dst_register(SVGA3DREG_TEMP,
emit->nr_hw_temp++);
emit->temp_color_output[i] = emit->output_map[i];
emit->temp_color_output[i] = emit->output_map[idx+i];
emit->true_color_output[i] = dst_register(SVGA3DREG_COLOROUT,
i);
}
......
......@@ -99,6 +99,7 @@ struct svga_shader_emitter
unsigned label[32];
unsigned nr_labels;
/** input/output register mappings, indexed by register number */
struct src_register input_map[PIPE_MAX_ATTRIBS];
SVGA3dShaderDestToken output_map[PIPE_MAX_ATTRIBS];
......@@ -119,7 +120,7 @@ struct svga_shader_emitter
/* shared output for depth and fog */
SVGA3dShaderDestToken vs_depth_fog;
/* PS output colors */
/* PS output colors (indexed by color semantic index) */
SVGA3dShaderDestToken temp_color_output[PIPE_MAX_COLOR_BUFS];
SVGA3dShaderDestToken true_color_output[PIPE_MAX_COLOR_BUFS];
......
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