tc-s12z.c 81.3 KB
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/* tc-s12z.c -- Assembler code for the Freescale S12Z
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   Copyright (C) 2018-2019 Free Software Foundation, Inc.
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   This file is part of GAS, the GNU Assembler.

   GAS is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.

   GAS is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with GAS; see the file COPYING.  If not, write to
   the Free Software Foundation, 51 Franklin Street - Fifth Floor,
   Boston, MA 02110-1301, USA.  */

#include "as.h"
#include "safe-ctype.h"
#include "subsegs.h"
#include "dwarf2dbg.h"
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#include "opcode/s12z.h"
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#include <stdint.h>
#include <limits.h>
#include <stdbool.h>

const char comment_chars[] = ";";

const char line_comment_chars[] = "#*";
const char line_separator_chars[] = "";

const char EXP_CHARS[] = "eE";
const char FLT_CHARS[] = "dD";

static char *fail_line_pointer;


/* Options and initialization.  */

const char *md_shortopts = "Sm:";

struct option md_longopts[] =
  {
  };

size_t md_longopts_size = sizeof (md_longopts);


relax_typeS md_relax_table[] =
  {

  };

/* This table describes all the machine specific pseudo-ops the assembler
   has to support.  The fields are:
   pseudo-op name without dot
   function to call to execute this pseudo-op
   Integer arg to pass to the function.  */
const pseudo_typeS md_pseudo_table[] =
  {
    {0, 0, 0}
  };


/* Get the target cpu for the assembler.  */
const char *
s12z_arch_format (void)
{
  return "elf32-s12z";
}

enum bfd_architecture
s12z_arch (void)
{
  return bfd_arch_s12z;
}

int
s12z_mach (void)
{
  return 0;
}

/* Listing header selected according to cpu.  */
const char *
s12z_listing_header (void)
{
  return "S12Z GAS ";
}

void
md_show_usage (FILE *stream ATTRIBUTE_UNUSED)
{
}

void
s12z_print_statistics (FILE *file ATTRIBUTE_UNUSED)
{
}

int
md_parse_option (int c ATTRIBUTE_UNUSED, const char *arg ATTRIBUTE_UNUSED)
{
  return 0;
}

symbolS *
md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
{
  return 0;
}

const char *
md_atof (int type, char *litP, int *sizeP)
{
  return ieee_md_atof (type, litP, sizeP, TRUE);
}

valueT
md_section_align (asection *seg, valueT addr)
{
  int align = bfd_get_section_alignment (stdoutput, seg);
  return ((addr + (1 << align) - 1) & -(1 << align));
}

void
md_begin (void)
{
}

void
s12z_init_after_args (void)
{
}

/* Builtin help.  */


static char *
skip_whites (char *p)
{
  while (*p == ' ' || *p == '\t')
    p++;

  return p;
}



/* Start a new insn that contains at least 'size' bytes.  Record the
   line information of that insn in the dwarf2 debug sections.  */
static char *
s12z_new_insn (int size)
{
  char *f = frag_more (size);

  dwarf2_emit_insn (size);

  return f;
}



static int lex_reg_name (uint16_t which, int *reg);

static int
lex_constant (long *v)
{
  char *end = NULL;
  char *p = input_line_pointer;

  /* A constant may not have the same value as a register
     eg: "d6" */
  int dummy;
  if (lex_reg_name (~0, &dummy))
    {
      input_line_pointer = p;
      return 0;
    }

  errno = 0;
  *v = strtol (p, &end, 0);
  if (errno == 0 && end != p)
    {
      input_line_pointer = end;
      return 1;
    }

  return 0;
}

static int
lex_match (char x)
{
  char *p = input_line_pointer;
  if (*p != x)
    return 0;

  input_line_pointer++;
  return 1;
}


static int
lex_expression (expressionS *exp)
{
  char *ilp = input_line_pointer;
  int dummy;
  exp->X_op = O_absent;

  if (lex_match ('#'))
    goto fail;

  if (lex_reg_name (~0, &dummy))
    goto fail;

  expression (exp);
  if (exp->X_op != O_absent)
    return 1;

 fail:
  fail_line_pointer = input_line_pointer;
  input_line_pointer = ilp;
  return 0;
}

/* immediate operand */
static int
lex_imm (long *v)
{
  char *ilp = input_line_pointer;

  if (*input_line_pointer != '#')
    goto fail;

  input_line_pointer++;
  expressionS exp;
  if (!lex_expression (&exp))
    goto fail;

  if (exp.X_op != O_constant)
    goto fail;

  *v = exp.X_add_number;
  return 1;

fail:
  fail_line_pointer = input_line_pointer;
  input_line_pointer = ilp;
  return 0;
}

/* Short mmediate operand */
static int
lex_imm_e4 (long *val)
{
  char *ilp = input_line_pointer;
  if ((lex_imm (val)))
    {
      if ((*val == -1) || (*val > 0 && *val <= 15))
	{
	  return 1;
	}
    }
  fail_line_pointer = input_line_pointer;
  input_line_pointer = ilp;
  return 0;
}

static int
lex_match_string (const char *s)
{
  char *p = input_line_pointer;
  while (p != 0 && *p != '\t' && *p != ' ' && *p != '\0')
    {
      p++;
    }

  size_t len = p - input_line_pointer;
  if (len != strlen (s))
    return 0;

  if (0 == strncasecmp (s, input_line_pointer, len))
    {
      input_line_pointer = p;
      return 1;
    }

  return 0;
}

/* Parse a register name.
   WHICH is a ORwise combination of the registers which are accepted.
   ~0 accepts all.
   On success, REG will be filled with the index of the register which
   was successfully scanned.
*/
static int
lex_reg_name (uint16_t which, int *reg)
{
  char *p = input_line_pointer;
  while (p != 0 &&
	 ((*p >= 'a' && *p <='z') || (*p >= '0' && *p <= '9') || (*p >= 'A' && *p <='Z')))
    {
      p++;
    }

  int len = p - input_line_pointer;

  if (len <= 0)
    return 0;

  int i;
  for (i = 0; i < S12Z_N_REGISTERS; ++i)
    {
      gas_assert (registers[i].name);

      if (0 == strncasecmp (registers[i].name, input_line_pointer, len))
	{
	  if ((0x1U << i) & which)
	    {
	      input_line_pointer = p;
	      *reg = i;
	      return 1;
	    }
	}
    }

  return 0;
}

static int
lex_force_match (char x)
{
  char *p = input_line_pointer;
  if (*p != x)
    {
      as_bad (_("Expecting '%c'"), x);
      return 0;
    }

  input_line_pointer++;
  return 1;
}

static int
lex_opr (uint8_t *buffer, int *n_bytes, expressionS *exp)
{
  char *ilp = input_line_pointer;
  uint8_t *xb = buffer;
  int reg;
  long imm;
  exp->X_op = O_absent;
  *n_bytes = 0;
  *xb = 0;
  if (lex_imm_e4 (&imm))
    {
      if (imm > 0)
	*xb = imm;
      else
	*xb = 0;
      *xb |= 0x70;
      *n_bytes = 1;
      return 1;
    }
  else if (lex_reg_name (REG_BIT_Dn, &reg))
    {
      *xb = reg;
      *xb |= 0xb8;
      *n_bytes = 1;
      return 1;
    }
  else if (lex_match ('['))
    {
      if (lex_expression (exp))
	{
	  long c = exp->X_add_number;
	  if (lex_match (','))
	    {
	      if (lex_reg_name (REG_BIT_XYSP, &reg))
		{
		  int i;
		  if (c <= 255 && c >= -256)
		    {
		      *n_bytes = 2;
		      *xb |= 0xc4;
		    }
		  else
		    {
		      *n_bytes = 4;
		      *xb |= 0xc6;
		    }
		  *xb |= (reg - REG_X) << 4;

		  if (c < 0)
		    *xb |= 0x01;
		  for (i = 1; i < *n_bytes ; ++i)
		    {
		      buffer[i] = c >> (8 * (*n_bytes - i - 1));
		    }
		}
	      else
		{
		  as_bad (_("Bad operand for constant offset"));
		  goto fail;
		}
	    }
	  else
	    {
	      *xb = 0xfe;
	      *n_bytes = 4;
	      buffer[1] = c >> 16;
	      buffer[2] = c >> 8;
	      buffer[3] = c;
	    }
	}
      else if (lex_reg_name (REG_BIT_Dn, &reg))
	{
	  if (!lex_force_match (','))
	    goto fail;

	  int reg2;
	  if (lex_reg_name (REG_BIT_XY, &reg2))
	    {
	      *n_bytes = 1;
	      *xb = reg;
	      *xb |= (reg2 - REG_X) << 4;
	      *xb |= 0xc8;
	    }
	  else
	    {
	      as_bad (_("Invalid operand for register offset"));
	      goto fail;
	    }
	}
      else
	{
	  goto fail;
	}
      if (!lex_force_match (']'))
	goto fail;
      return 1;
    }
  else if (lex_match ('('))
    {
      long c;
      if (lex_constant (&c))
	{
	  if (!lex_force_match (','))
	    goto fail;
	  int reg2;
	  if (lex_reg_name (REG_BIT_XYSP, &reg2))
	    {
	      if (reg2 != REG_P && c >= 0 && c <= 15)
		{
		  *n_bytes = 1;
		  *xb = 0x40;
		  *xb |= (reg2 - REG_X) << 4;
		  *xb |= c;
		}
	      else if (c >= -256 && c <= 255)
		{
		  *n_bytes = 2;
		  *xb = 0xc0;
		  *xb |= (reg2 - REG_X) << 4;
		  if (c < 0)
		    *xb |= 0x01;
		  buffer[1] = c;
		}
	      else
		{
		  *n_bytes = 4;
		  *xb = 0xc2;
		  *xb |= (reg2 - REG_X) << 4;
		  buffer[1] = c >> 16;
		  buffer[2] = c >> 8;
		  buffer[3] = c;
		}
	    }
	  else if (lex_reg_name (REG_BIT_Dn, &reg2))
	    {
	      if (c >= -1 * (long) (0x1u << 17)
		  &&
		  c < (long) (0x1u << 17) - 1)
		{
		  *n_bytes = 3;
		  *xb = 0x80;
		  *xb |= reg2;
		  *xb |= ((c >> 16) & 0x03) << 4;
		  buffer[1] = c >> 8;
		  buffer[2] = c;
		}
	      else
		{
		  *n_bytes = 4;
		  *xb = 0xe8;
		  *xb |= reg2;
		  buffer[1] = c >> 16;
		  buffer[2] = c >> 8;
		  buffer[3] = c;
		}
	    }
	  else
	    {
	      as_bad (_("Bad operand for constant offset"));
	      goto fail;
	    }
	}
      else if (lex_reg_name (REG_BIT_Dn, &reg))
	{
	  if (lex_match (','))
	    {
	      int reg2;
	      if (lex_reg_name (REG_BIT_XYS, &reg2))
		{
		  *n_bytes = 1;
		  *xb = 0x88;
		  *xb |= (reg2 - REG_X) << 4;
		  *xb |= reg;
		}
	      else
		{
		  as_bad (_("Invalid operand for register offset"));
		  goto fail;
		}
	    }
	  else
	    {
	      goto fail;
	    }
	}
      else if (lex_reg_name (REG_BIT_XYS, &reg))
	{
	  if (lex_match ('-'))
	    {
	      if (reg == REG_S)
		{
		  as_bad (_("Invalid register for postdecrement operation"));
		  goto fail;
		}
	      *n_bytes = 1;
	      if (reg == REG_X)
		*xb = 0xc7;
	      else if (reg == REG_Y)
		*xb = 0xd7;
	    }
	  else if (lex_match ('+'))
	    {
	      *n_bytes = 1;
	      if (reg == REG_X)
		*xb = 0xe7;
	      else if (reg == REG_Y)
		*xb = 0xf7;
	      else if (reg == REG_S)
		*xb = 0xff;
	    }
	  else
	    {
	      goto fail;
	    }
	}
      else if (lex_match ('+'))
	{
	  if (lex_reg_name (REG_BIT_XY, &reg))
	    {
	      *n_bytes = 1;
	      if (reg == REG_X)
		*xb = 0xe3;
	      else if (reg == REG_Y)
		*xb = 0xf3;
	    }
	  else
	    {
	      as_bad (_("Invalid register for preincrement operation"));
	      goto fail;
	    }
	}
      else if (lex_match ('-'))
	{
	  if (lex_reg_name (REG_BIT_XYS, &reg))
	    {
	      *n_bytes = 1;
	      if (reg == REG_X)
		*xb = 0xc3;
	      else if (reg == REG_Y)
		*xb = 0xd3;
	      else if (reg == REG_S)
		*xb = 0xfb;
	    }
	  else
	    {
	      as_bad (_("Invalid register for predecrement operation"));
	      goto fail;
	    }
	}
      else
	{
	  goto fail;
	}

      if (! lex_match (')'))
	goto fail;
      return 1;
    }
  else if (lex_expression (exp))
    {
      *xb = 0xfa;
      *n_bytes = 4;
      buffer[1] = 0;
      buffer[2] = 0;
      buffer[3] = 0;
      if (exp->X_op == O_constant)
	{
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	  valueT value = exp->X_add_number;

	  if (value < (0x1U << 14))
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	    {
	      *xb = 0x00;
	      *n_bytes = 2;
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	      *xb |= value >> 8;
	      buffer[1] = value;
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	    }
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	  else if (value < (0x1U << 19))
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	    {
	      *xb = 0xf8;
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	      if (value & (0x1U << 17))
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		*xb |= 0x04;
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	      if (value & (0x1U << 16))
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		*xb |= 0x01;
	      *n_bytes = 3;
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	      buffer[1] = value >> 8;
	      buffer[2] = value;
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	    }
	  else
	    {
	      *xb = 0xfa;
	      *n_bytes = 4;
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	      buffer[1] = value >> 16;
	      buffer[2] = value >> 8;
	      buffer[3] = value;
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	    }
	}
      return 1;
    }

 fail:
  fail_line_pointer = input_line_pointer;
  input_line_pointer = ilp;
  return 0;
}

static int
lex_offset (long *val)
{
  char *end = NULL;
  char *p = input_line_pointer;

  if (*p++ != '*')
    return 0;

  if (*p != '+' && *p != '-')
    return 0;

  bool negative =  (*p == '-');
  p++;

  errno = 0;
  *val = strtol (p, &end, 0);
  if (errno == 0)
    {
      if (negative)
	*val *= -1;
      input_line_pointer = end;
      return 1;
    }

  return 0;
}



struct instruction;

typedef int (*parse_operand_func) (const struct instruction *);

struct instruction
{
  const char *name;

  /* The "page" to which the instruction belongs.
     This is also only a hint.  Some instructions might have modes in both
     pages... */
  char page;

  /* This is a hint - and only a hint - about the opcode of the instruction.
     The parse_operand_func is free to ignore it.
  */
  uint8_t opc;

  parse_operand_func parse_operands;

  /* Some instructions can be encoded with a different opcode */
  uint8_t alt_opc;
};

static int
no_operands (const struct instruction *insn)
{
  if (*input_line_pointer != '\0')
    {
      as_bad (_("Garbage at end of instruction"));
      return 0;
    }

  char *f = s12z_new_insn (insn->page);
  if (insn->page == 2)
    number_to_chars_bigendian (f++, PAGE2_PREBYTE, 1);

  number_to_chars_bigendian (f++, insn->opc, 1);

  return 1;
}

/* Emit the code for an OPR address mode operand */
static char *
emit_opr (char *f, const uint8_t *buffer, int n_bytes, expressionS *exp)
{
  int i;
  number_to_chars_bigendian (f++, buffer[0], 1);
  if (exp->X_op != O_absent && exp->X_op != O_constant)
    {
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      fixS *fix = fix_new_exp (frag_now,
			       f - frag_now->fr_literal,
			       3,
			       exp,
			       FALSE,
			       BFD_RELOC_S12Z_OPR);
      /* Some third party tools seem to use the lower bits
	of this addend for flags.   They don't get added
	to the final location.   The purpose of these flags
	is not known.  We simply set it to zero.  */
      fix->fx_addnumber = 0x00;
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    }
  for (i = 1; i < n_bytes; ++i)
    number_to_chars_bigendian (f++,  buffer[i], 1);

  return f;
}

/* Emit the code for a 24 bit direct address operand */
static char *
emit_ext24 (char *f, long v)
{
  number_to_chars_bigendian (f, v, 3);

  return f + 3;
}

static int
opr (const struct instruction *insn)
{
  uint8_t buffer[4];
  int n_bytes;
  expressionS exp;
  if (lex_opr (buffer, &n_bytes, &exp))
    {
      /* Large constant direct values are more efficiently encoded as ext24 mode.
	 Otherwise a decision has to be deferred to a relax. */
      if (exp.X_op == O_constant
	  && buffer[0] == 0xFA
	  && insn->alt_opc != 0)
	{
	  char *f = s12z_new_insn (4);

	  /* I don't think there are any instances of page 2 opcodes in this case */
	  gas_assert (insn->page == 1);

	  number_to_chars_bigendian (f++, insn->alt_opc, 1);

	  emit_ext24 (f, exp.X_add_number);
	}
      else
	{
	  char *f = s12z_new_insn (n_bytes + 1);
	  number_to_chars_bigendian (f++, insn->opc, 1);

	  emit_opr (f, buffer, n_bytes, &exp);
	}
      return 1;
    }

  return 0;
}

/* Parse a 15 bit offset, as an expression.
   LONG_DISPLACEMENT will be set to true if the offset is wider than 7 bits.
   */
static int
lex_15_bit_offset (bool *long_displacement, expressionS *exp)
{
  char *ilp = input_line_pointer;

  long val;
  if (lex_offset (&val))
    {
      exp->X_op = O_absent;
      exp->X_add_number = val;
    }
  else if (lex_expression (exp))
    {
      if (exp->X_op == O_constant)
	{
	  val = exp->X_add_number;
	}
      else
	{
	  /* If a symbol was parsed we don't know the displacement.
	     We have to assume it is long, and relax it later if possible. */
	  *long_displacement = true;
	  return 1;
	}
    }
  else
    {
      exp->X_op = O_absent;
      goto fail;
    }

  if (val > 0x3FFF || val < -0x4000)
    {
      as_fatal (_("Offset is outside of 15 bit range"));
      return 0;
    }

  *long_displacement = (val > 63 || val < -64);

  return 1;

 fail:
  fail_line_pointer = input_line_pointer;
  input_line_pointer = ilp;
  return 0;
}

static void
emit_15_bit_offset (char *f, int where, expressionS *exp)
{
  gas_assert (exp);
  if (exp->X_op != O_absent && exp->X_op != O_constant)
    {
      exp->X_add_number += where;
      fixS *fix = fix_new_exp (frag_now,
		   f - frag_now->fr_literal,
		   2,
		   exp,
		   TRUE,
		   BFD_RELOC_16_PCREL);
      fix->fx_addnumber = where - 2;
    }
  else
    {
      long val = exp->X_add_number;
      bool long_displacement = (val > 63 || val < -64);
      if (long_displacement)
	val |= 0x8000;
      else
	val &= 0x7F;

      number_to_chars_bigendian (f++, val, long_displacement ? 2 : 1);
    }
}

static int
rel (const struct instruction *insn)
{
  bool long_displacement;

  expressionS exp;
  if (! lex_15_bit_offset (&long_displacement, &exp))
    return 0;

  char *f = s12z_new_insn (long_displacement ? 3 : 2);
  number_to_chars_bigendian (f++, insn->opc, 1);
  emit_15_bit_offset (f, 3, &exp);
  return 1;
}

static int
reg_inh (const struct instruction *insn)
{
  int reg;
  if (lex_reg_name (REG_BIT_Dn, &reg))
    {
      char *f = s12z_new_insn (insn->page);
      if (insn->page == 2)
	number_to_chars_bigendian (f++, PAGE2_PREBYTE, 1);

      number_to_chars_bigendian (f++, insn->opc + reg, 1);
      return 1;
    }

  return 0;
}


/* Special case for CLR X and CLR Y */
static int
clr_xy (const struct instruction *insn ATTRIBUTE_UNUSED)
{
  int reg;
  if (lex_reg_name (REG_BIT_XY, &reg))
    {
      char *f = s12z_new_insn (1);
      number_to_chars_bigendian (f, 0x9a + reg - REG_X, 1);
      return 1;
    }

  return 0;
}

/* Some instructions have a suffix like ".l", ".b", ".w" etc
   which indicates the size of the operands. */
static int
size_from_suffix  (const struct instruction *insn, int idx)
{
  const char *dot = strchr (insn->name, '.');

  if (dot == NULL)
    return -3;

  int size = -2;
  switch (dot[1 + idx])
    {
    case 'b':
      size = 1;
      break;
    case 'w':
      size = 2;
      break;
    case 'p':
      size = 3;
      break;
    case 'l':
      size = 4;
      break;
    default:
      as_fatal (_("Bad size"));
    };

  return size;
}

static int
mul_reg_reg_reg (const struct instruction *insn)
{
  char *ilp = input_line_pointer;

  int Dd;
  if (!lex_reg_name (REG_BIT_Dn, &Dd))
    goto fail;

  if (!lex_match (','))
    goto fail;

  int Dj;
  if (!lex_reg_name (REG_BIT_Dn, &Dj))
    goto fail;

  if (!lex_match (','))
    goto fail;

  int Dk;
  if (!lex_reg_name (REG_BIT_Dn, &Dk))
    goto fail;

  char *f = s12z_new_insn (insn->page + 1);
  if (insn->page == 2)
    number_to_chars_bigendian (f++, PAGE2_PREBYTE, 1);

  number_to_chars_bigendian (f++, insn->opc + Dd, 1);
  const char *dot = strchrnul (insn->name, '.');
  uint8_t mb ;
  switch (dot[-1])
    {
    case 's':
      mb = 0x80;
      break;
    case 'u':
      mb = 0x00;
      break;
    default:
      as_fatal (_("BAD MUL"));
      break;
    }

  mb |= Dj << 3;
  mb |= Dk;
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