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    AArch64: Remove ldgv and stgv instructions from Armv8.5-A Memory Tagging Extension. · 64485cb2
    Sudi Das authored
    This patch is part of a series of patches to introduce a few changes to the
    Armv8.5-A Memory Tagging Extension. This patch removes the LDGV and STGV
    instructions. These instructions needed special infrastructure to support
    [base]! style for addressing mode. That is also removed now.
    
    Committed on behalf of Sudakshina Das.
    
    *** gas/ChangeLog ***
    
    	* config/tc-aarch64.c (parse_address_main): Remove support for
    	[base]! address expression.
    	(parse_operands): Remove support for AARCH64_OPND_ADDR_SIMPLE_2.
    	(warn_unpredictable_ldst): Remove support for ldstgv_indexed.
    	* testsuite/gas/aarch64/armv8_5-a-memtag.d: Remove tests for ldgv
    	and stgv.
    	* testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise.
    	* testsuite/gas/aarch64/illegal-memtag.l: Likewise.
    	* testsuite/gas/aarch64/illegal-memtag.s: Likewise.
    
    *** include/ChangeLog ***
    
    	* opcode/aarch64.h (enum aarch64_opnd): Remove
    	AARCH64_OPND_ADDR_SIMPLE_2.
    	(enum aarch64_insn_class): Remove ldstgv_indexed.
    
    *** opcodes/ChangeLog ***
    
    	* aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
    	* aarch64-asm.h (ins_addr_simple_2): Likeiwse.
    	* aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
    	* aarch64-dis.h (ext_addr_simple_2): Likewise.
    	* aarch64-opc.c (operand_general_constraint_met_p): Remove
    	case for ldstgv_indexed.
    	(aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
    	* aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
    	(AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
    	* aarch64-asm-2.c: Regenerated.
    	* aarch64-dis-2.c: Regenerated.
    	* aarch64-opc-2.c: Regenerated.
    
    (cherry picked from commit 550fd7bf)
    64485cb2
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