Commit 41952387 authored by Joern Rennecke's avatar Joern Rennecke

Check in ARCompact simulator. A valid configuration is arc-elf.

This is not quite finished and has most likely a few files that are
obsolete & not used, but it's good enough to run gcc regression tests.
parent fa7f0c2d
By codito
added files:
gas/testsuite/gas/arc/general_a700.d
gas/testsuite/gas/arc/dsp1.d
gas/testsuite/gas/arc/general_a700.s
gas/testsuite/gas/arc/dsp1.s
gas/testsuite/gas/arc/ld_arc700.s
gas/testsuite/gas/arc/sub_s.d
gas/testsuite/gas/arc/lsl_s.d
gas/testsuite/gas/arc/gen_simd.d
gas/testsuite/gas/arc/sub_s.s
gas/testsuite/gas/arc/lsl_s.s
gas/testsuite/gas/arc/prefetch.d
gas/testsuite/gas/arc/gen_simd.s
gas/testsuite/gas/arc/reloctest.d
gas/testsuite/gas/arc/arc700.exp
gas/testsuite/gas/arc/dsp2.d
gas/testsuite/gas/arc/prefetch.s
gas/testsuite/gas/arc/reloctest.s
gas/testsuite/gas/arc/dsp2.s
gas/testsuite/gas/arc/mpy_a700.d
gas/testsuite/gas/arc/ex_arc700.s
gas/testsuite/gas/arc/mpy_a700.s
gas/config/extlib
gas/config/extlib/configure
gas/config/extlib/Makefile.in
gas/config/extlib/arcsimd.s
gas/config/extlib/configure.in
gas/config/extlib/arcextlib.s
include/elf/ChangeLog.codito
libgloss/arc/syscall.h (delivered as linux/include/asm-arcnommu/unistd.h)
ld/emultempl/arclinux.em
ld/configdoc.texi
ld/scripttempl/elfarc.sc
ld/scripttempl/arclinux.sc
ld/emulparams/arclinux.sh
md5.sum
opcodes/ChangeLog.codito
opcodes/arcompact-dis.c
changed files:
bfd/archures.c (merged)
bfd/bfd-in2.h (merged/regenerated)
bfd/config.bfd
bfd/configure.in
bfd/cpu-arc.c (merged)
bfd/elf32-arc.c
bfd/reloc.c
bfd/cpu-arc.c
Makefile.in
gas/configure.tgt (patch was originally in configure.in)
gas/doc/c-arc.texi
gas/doc/as.texinfo
gas/configure.in
gas/testsuite/gas/arc/swi.d
gas/testsuite/gas/arc/sbc.d
gas/testsuite/gas/arc/sleep.d
gas/testsuite/gas/arc/brk.d
gas/testsuite/gas/arc/swi.s
gas/testsuite/gas/arc/rrc.d
gas/testsuite/gas/arc/bic.d
gas/testsuite/gas/arc/extb.d
gas/testsuite/gas/arc/arc.exp
gas/testsuite/gas/arc/asl.d
gas/testsuite/gas/arc/asr.d
gas/testsuite/gas/arc/sexw.d
gas/testsuite/gas/arc/adc.d
gas/testsuite/gas/arc/lsr.d
gas/testsuite/gas/arc/mov.d
gas/testsuite/gas/arc/ror.d
gas/testsuite/gas/arc/and.d
gas/testsuite/gas/arc/xor.d
gas/testsuite/gas/arc/rlc.d
gas/testsuite/gas/arc/or.d
gas/testsuite/gas/arc/sexb.d
gas/testsuite/gas/arc/jl.d
gas/testsuite/gas/arc/extw.d
gas/testsuite/gas/arc/add.d
gas/testsuite/gas/arc/sub.d
gas/struc-symbol.h
gas/config/tc-arc.c
gas/config/tc-arc.h
gas/Makefile.am
include/dis-asm.h
include/elf/arc.h
include/elf/common.h (adapted)
include/opcode/arc.h
ld/configure.in
ld/emulparams/arcelf.sh
ld/configure.tgt
ld/Makefile.am
binutils/configure.in
binutils/testsuite/binutils-all/objdump.exp
binutils/readelf.c
opcodes/configure.in
opcodes/arc-dis.c
opcodes/arc-dis.h
opcodes/arc-opc.c
opcodes/Makefile.am
opcodes/arc-ext.c
opcodes/arc-ext.h
gdb/doc/Makefile.in
gdb/doc/gdb.texinfo
gdb/remote.c
gdb/testsuite/gdb.base/float.exp
gdb/testsuite/lib/gdbserver-support.exp
gdb/testsuite/gdb.asm/asm-source.exp
gdb/dwarf2read.c
gdb/dwarf2-frame.c
gdb/configure.tgt
gdb/version.in
gdb/gdbserver/Makefile.in
gdb/gdbserver/configure.srv
gdb/gdbserver/proc-service.c
gdb/gdbserver/remote-utils.c
gdb/Makefile.in
By ARC employees:
added files:
cgen/cpu/ARCompact.cpu
cgen/cpu/arc.opc
cgen/cpu/arc.cpu
cpu/arc.opc
cpu/sh-sim.cpu
cpu/arc.cpu
cpu/ARCompact.cpu
gas/ChangeLog.ARC
gdb/config/arc/arc.mt
include/gdb/target-io/arc.h
ld/ChangeLog.ARC
opcodes/arc-opc.h
opcodes/arc-opinst.c
opcodes/arc-desc.c
opcodes/arc-desc.h
opcodes/arc-ibld.c
opcodes/arc-asm.c
sim/arc/ChangeLog
sim/arc/configure.ac
sim/arc/mloop5.in
sim/arc/mloop6.in
sim/arc/mloop7.in
sim/arc/arc-sim.h
sim/arc/Makefile.in
sim/arc/tconfig.in
sim/arc/sim-main.h
sim/arc/devices.c
sim/arc/sim-if.c
sim/arc/arc5.c
sim/arc/arc6.c
sim/arc/arc7.c
sim/arc/config.in
sim/arc/configure
sim/arc/arch.h
sim/arc/arch.c
sim/arc/decode5.h
sim/arc/decode6.h
sim/arc/decode7.h
sim/arc/decode5.c
sim/arc/decode6.c
sim/arc/decode7.c
sim/arc/sem5-switch.c
sim/arc/sem6-switch.c
sim/arc/sem7-switch.c
sim/arc/sem5.c
sim/arc/sem6.c
sim/arc/sem7.c
sim/arc/cpu5.h
sim/arc/cpu6.h
sim/arc/cpu7.h
sim/arc/cpuall.h
sim/arc/cpu5.c
sim/arc/cpu6.c
sim/arc/cpu7.c
sim/arc/model5.c
sim/arc/model6.c
sim/arc/model7.c
sim/arc/traps.c
sim/common/ChangeLog.ARC
newlib/ChangeLog.ARC
newlib/libc/sys/arc/sys/fcntl.h
replaced files:
opcodes/arc-dis.c
opcodes/arc-opc.c
changed files:
bfd/configure
bfd/elf32-arc.c
bfd/libbfd.h
bfd/bfd-in2.h
cgen/ChangeLog
cgen/read.scm
cgen/sim-cpu.scm
cgen/utils-sim.scm
cgen/cpu/ip2k.opc
cgen/cpu/sparc.opc
cgen/cpu/xc16x.opc
cgen/cpu/fr30.opc
cgen/cpu/mep.opc
cgen/cpu/m32r.opc
cgen/cpu/i960.opc
cgen/cpu/sh.opc
cgen/cpu/iq2000.opc
cgen/cpu/openrisc.opc
cgen/cpu/xstormy16.opc
cgen/opc-itab.scm
cpu/ChangeLog
gas/config/tc-arc.c
gas/config/tc-arc.h
gas/configure
gas/Makefile.in
gas/doc/c-arc.texi
gas/as.c
gas/symbols.c
gas/symbols.h
gdb/ChangeLog
gdb/configure.tgt
include/ChangeLog
include/dis-asm.h
include/gdb/callback.h
include/gdb/ChangeLog
include/opcode/arc.h
include/opcode/cgen.h
ld/ChangeLog
ld/scripttempl/arclinux.sc
ld/scripttempl/elfarc.sc
ld/emulparams/arclinux.sh
ld/Makefile.am
ld/Makefile.in
libgloss/ChangeLog
opcodes/arc-dis.h
opcodes/arc-dis.c
opcodes/arc-ext.h
opcodes/arc-ext.c
opcodes/arc-opc.c
opcodes/ChangeLog
opcodes/configure
opcodes/configure.in
opcodes/Makefile.am
opcodes/Makefile.in
opcodes/cgen-dis.c
sim/ChangeLog
sim/configure.ac
sim/configure
sim/common/callback.c
sim/common/cgen-trace.c
sim/common/ChangeLog
sim/common/gennltvals.sh
sim/common/gentvals.sh
sim/common/nltvals.def
sim/common/sim-utils.c
sim/common/syscall.c
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/* Target dependent code for ARC700, for GDB, the GNU debugger.
Copyright 2005 Free Software Foundation, Inc.
Contributed by Codito Technologies Pvt. Ltd. (www.codito.com)
Authors:
Sameer Dhavale <sameer.dhavale@codito.com>
Soam Vasani <soam.vasani@codito.com>
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#define ARC_NR_CORE_REGS 64
#define MAX_ARC700_REG_SIZE 4
#define JTAG_READ_FAILURE 0
#define JTAG_WRITE_FAILURE 0
enum arc_jtag_status
{
JTAG_OPENED,
JTAG_CLOSED,
JTAG_RUNNING
};
struct jtag_ops{
char *name;
void (*jtag_open) (void);
void (*jtag_close) (void);
int (*jtag_memory_write) (unsigned int, unsigned int *, int);
int (*jtag_memory_chunk_write) (unsigned int, unsigned int *, int);
int (*jtag_memory_read) (unsigned int, unsigned int *, int);
int (*jtag_memory_chunk_read) (unsigned int, unsigned int *, int);
int (*jtag_read_aux_reg) (unsigned int, unsigned int *);
int (*jtag_write_aux_reg) (unsigned int, unsigned int);
int (*jtag_read_core_reg) (unsigned int, unsigned int *);
int (*jtag_write_core_reg) (unsigned int, unsigned int);
void (*jtag_wait) (void);
void (*jtag_reset_board) (void);
enum arc_jtag_status jtag_status;
int arc_jtag_state_machine_debug;
};
#define IS_ARC700 (arc_get_architecture() == ARC700)
#define IS_ARC600 (arc_get_architecture() == ARC600)
#define IS_A5 (arc_get_architecture() == A5)
#define IS_A4 (arc_get_architecture() == A4)
/* Target dependent code for ARC700, for GDB, the GNU debugger.
Copyright 2005 Free Software Foundation, Inc.
Contributed by Codito Technologies Pvt. Ltd. (www.codito.com)
Authors:
Soam Vasani <soam.vasani@codito.com>
Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#include <string.h>
#include "defs.h"
#include "osabi.h"
#include "frame.h"
#include "regcache.h"
#include "gdb_assert.h"
#include "inferior.h"
#include "gdbcmd.h"
#include "reggroups.h"
#include "arc-tdep.h"
#include "arc-jtag.h"
#ifdef ARC4_JTAG
/* brk */
unsigned int a4_jtag_breakpoint_size = 4;
unsigned char a4_jtag_breakpoint_insn[4] = { 0x00, 0xfe, 0xff, 0x1f };
#define A4_HALT_VALUE 0x02000000
#else
/* brk_s */
unsigned int arc700_jtag_breakpoint_size = 2;
unsigned char arc700_jtag_breakpoint_insn[2] = { 0xff, 0x7f };
#endif
struct arc_reg_info
{
char *name ;
int hw_regno;
char *description;
#ifdef ARC4_JTAG
enum arc4_jtag_regnums gdbregno;
#else
enum arc700_jtag_regnums gdbregno;
#endif
enum ARCProcessorVersion arcVersionSupported;
};
static const char *
arc_jtag_register_name (int regno)
{
static char jtag_names[][30] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6",
"r7", "r8", "r9", "r10", "r11", "r12", "r13",
"r14", "r15", "r16", "r17", "r18", "r19", "r20",
"r21", "r22", "r23", "r24", "r25", "r26",
"fp",
"sp",
"ilink1",
"ilink2",
"blink",
/* Extension core regs are 32..59 inclusive. */
"r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
"r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", "r48", "r49",
"r50", "r51", "r52", "r53", "r54", "r55", "r56", "r57", "r58", "r59",
"lp_count",
/* 61 is reserved, 62 is not a real register. */
/*FIXMEA: The following 3 are supposed to be registers
that are used only to encode immediate values in A4*/
"r61",
"r62",
"pcl",
/* Now the aux registers. */
"status",
"semaphore",
"lp_start",
"lp_end",
"identity",
"debug",
#ifndef ARC4_JTAG
"pc",
"status32",
"status32_l1",
"status32_l2",
"count0",
"control0",
"limit0",
"int_vector_base",
"aux_macmode",
"aux_irq_lv12",
"count1",
"control1",
"limit1",
"aux_irq_lev",
"aux_irq_hint",
"eret",
"erbta",
"erstatus",
"ecr",
"efa",
"icause1",
"icause2",
"aux_ienable",
"aux_itrigger",
"xpu",
"bta",
"bta_l1",
"bta_l2",
"aux_irq_pulse_cancel",
"aux_irq_pending",
/* Build configuration registers. */
"bcr_0",
"dccm_base_build",
"crc_base_build",
"bta_link_build",
"dvbf_build",
"tel_instr_build",
"bcr_6",
"memsubsys",
"vecbase_ac_build",
"p_base_address",
"bcr_a",
"bcr_b",
"bcr_c",
"bcr_d",
"bcr_e",
"mmu_build",
"arcangel_build",
"bcr_11",
"d_cache_build",
"madi_build",
"dccm_build",
"timer_build",
"ap_build",
"icache_build",
"iccm_build",
"dspram_build",
"mac_build",
"multiply_build",
"swap_build",
"norm_build",
"minmax_build",
"barrel_build",
#endif
};
gdb_assert(ARRAY_SIZE (jtag_names) == NUM_REGS + NUM_PSEUDO_REGS);
gdb_assert(regno >=0 && regno < NUM_REGS + NUM_PSEUDO_REGS);
return jtag_names[regno];
}
int
arc_jtag_register_reggroup_p (int regnum, struct reggroup *group)
{
/* These registers don't exist, so they are not in any reggroup. */
if ((regnum >= 32 && regnum <= 59) || (regnum == 61) || (regnum == 62))
return 0;
/* Which regs to save/restore ? */
if ((group == save_reggroup || group == restore_reggroup))
{
/* Save/restore:
1. all core regs, except PCL (PCL is not writable)
2. aux regs LP_START..LP_END (IDENTITY is not writable)
3. aux regs PC_REGNUM..STATUS32_L2
3. aux regs ERET..EFA */
return ( ( regnum >= 0 && regnum < ARC_PCL_REGNUM)
|| ( regnum >= ARC_LP_START_REGNUM && regnum<= ARC_LP_END_REGNUM)
#ifdef ARC4_JTAG
|| ( regnum == ARC_STATUS_REGNUM)
#else
|| ( regnum >= ARC_PC_REGNUM && regnum <= ARC_STATUS32_L2_REGNUM)
|| ( regnum >= ARC_ERET_REGNUM && regnum <= ARC_EFA_REGNUM)
#endif
);
}
return -1;
}
static void
arc_jtag_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
struct frame_info *frame, int regnum, int all)
{
int i;
if (regnum >= 0 )
{
default_print_registers_info (gdbarch, file, frame, regnum, all);
return;
}
/* if regnum < 0 , print all registers */
for (i=0; i <= 26; ++i)
default_print_registers_info (gdbarch, file, frame, i, all);
default_print_registers_info (gdbarch, file, frame,
ARC_FP_REGNUM, all);
default_print_registers_info (gdbarch, file, frame,
ARC_SP_REGNUM, all);
default_print_registers_info (gdbarch, file, frame,
ARC_ILINK1_REGNUM, all);
default_print_registers_info (gdbarch, file, frame,
ARC_ILINK2_REGNUM, all);
default_print_registers_info (gdbarch, file, frame,
ARC_BLINK_REGNUM, all);
default_print_registers_info (gdbarch, file, frame,
ARC_LP_COUNT_REGNUM, all);
/* now the aux registers */
if (!all)
{
default_print_registers_info (gdbarch, file, frame,
ARC_LP_START_REGNUM, all);
default_print_registers_info (gdbarch, file, frame,
ARC_LP_END_REGNUM, all);
#ifndef ARC4_JTAG
default_print_registers_info (gdbarch, file,frame,
ARC_STATUS32_REGNUM, all);
default_print_registers_info (gdbarch, file, frame,
ARC_BTA_REGNUM, all);
default_print_registers_info (gdbarch, file, frame,
ARC_EFA_REGNUM, all);
default_print_registers_info (gdbarch, file, frame,
ARC_ERET_REGNUM, all);
default_print_registers_info (gdbarch, file, frame,
ARC_STATUS32_L1_REGNUM, all);
default_print_registers_info (gdbarch, file, frame,
ARC_STATUS32_L2_REGNUM, all);
default_print_registers_info (gdbarch, file, frame,
ARC_ERSTATUS_REGNUM, all);
/* PC */
default_print_registers_info (gdbarch, file, frame,
ARC_PC_REGNUM, all);
#endif
}
else
{
/* This part needs cleaning up. */
for (i = ARC_STATUS_REGNUM;
#ifndef ARC4_JTAG
i <= ARC_AUX_IRQ_PENDING_REGNUM;
#else /*FIXMEA*/
i <= ARC_DEBUG_REGNUM;
#endif
i ++ )
default_print_registers_info (gdbarch, file, frame ,
i, all);
for (i = ARC_STATUS_REGNUM ;
#ifndef ARC4_JTAG
i <= ARC_AUX_IRQ_PENDING_REGNUM;
#else /*FIXMEA*/
i <= ARC_DEBUG_REGNUM;
#endif
i ++ )
default_print_registers_info (gdbarch, file, frame,
i, all);
#ifndef ARC4_JTAG
for (i = ARC_BCR_1_REGNUM ;
i <= ARC_BCR_5_REGNUM ;
i ++ )
default_print_registers_info (gdbarch, file , frame,
i , all);
for (i = ARC_BCR_7_REGNUM ;
i <= ARC_BCR_9_REGNUM;
i ++ )
default_print_registers_info (gdbarch, file, frame,
i , all);
for (i = ARC_BCR_F_REGNUM;
i <= ARC_BCR_10_REGNUM;
i ++ )
default_print_registers_info (gdbarch, file, frame ,
i , all);
for (i = ARC_BCR_12_REGNUM;
i <= ARC_BCR_1F_REGNUM;
i ++)
default_print_registers_info (gdbarch, file, frame ,
i , all);
#endif //if no ARC4_JTAG