Commit 55e8aae7 authored by Srinath Parvathaneni's avatar Srinath Parvathaneni Committed by Nick Clifton
Browse files

Implement the assembly instructions yield, wfe, wfi and sev for ARMv6T2 in...

Implement the assembly instructions yield, wfe, wfi and sev for ARMv6T2 in both ARM mode and Thumb mode.

	* config/tc-arm.c (arm_ext_v6k_v6t2): Define.
	(insns) [ARM_VARIANT]: Modified.
	(insns) [THUMB_VARIANT]: To implement few ARMv6K instructions
	in ARMv6T2 as well.
	* testsuite/gas/arm/archv6t2-1.d: New test.
	* testsuite/gas/arm/archv6t2-1.s: Likewise.
	* testsuite/gas/arm/archv6t2-2.d: Likewise.
parent 4ea904ed
2019-01-14 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* config/tc-arm.c (arm_ext_v6k_v6t2): Define.
(insns) [ARM_VARIANT]: Modified.
(insns) [THUMB_VARIANT]: To implement few ARMv6K instructions
in ARMv6T2 as well.
* testsuite/gas/arm/archv6t2-1.d: New test.
* testsuite/gas/arm/archv6t2-1.s: Likewise.
* testsuite/gas/arm/archv6t2-2.d: Likewise.
2019-01-11 Alan Modra <amodra@gmail.com>
PR 23963
......
......@@ -204,6 +204,9 @@ static const arm_feature_set arm_ext_v5j = ARM_FEATURE_CORE_LOW (ARM_EXT_V5J);
static const arm_feature_set arm_ext_v6 = ARM_FEATURE_CORE_LOW (ARM_EXT_V6);
static const arm_feature_set arm_ext_v6k = ARM_FEATURE_CORE_LOW (ARM_EXT_V6K);
static const arm_feature_set arm_ext_v6t2 = ARM_FEATURE_CORE_LOW (ARM_EXT_V6T2);
/* Only for compatability of hint instructions. */
static const arm_feature_set arm_ext_v6k_v6t2 =
ARM_FEATURE_CORE_LOW (ARM_EXT_V6K | ARM_EXT_V6T2);
static const arm_feature_set arm_ext_v6_notm =
ARM_FEATURE_CORE_LOW (ARM_EXT_V6_NOTM);
static const arm_feature_set arm_ext_v6_dsp =
......@@ -19994,9 +19997,9 @@ static const struct asm_opcode insns[] =
TCE("usat16", 6e00f30, f3a00000, 3, (RRnpc, I15, RRnpc), usat16, t_usat16),
 
#undef ARM_VARIANT
#define ARM_VARIANT & arm_ext_v6k
#define ARM_VARIANT & arm_ext_v6k_v6t2
#undef THUMB_VARIANT
#define THUMB_VARIANT & arm_ext_v6k
#define THUMB_VARIANT & arm_ext_v6k_v6t2
 
tCE("yield", 320f001, _yield, 0, (), noargs, t_hint),
tCE("wfe", 320f002, _wfe, 0, (), noargs, t_hint),
......
# name: ARMv6T2 THUMB mode
# as: -march=armv6t2 -mthumb
# source: archv6t2-1.s
# objdump: -dr --prefix-addresses --show-raw-insn
.*: +file format .*arm.*
Disassembly of section .text:
0[0-9a-f]+ <[^>]+> bf10 yield
0[0-9a-f]+ <[^>]+> bf20 wfe
0[0-9a-f]+ <[^>]+> bf30 wfi
0[0-9a-f]+ <[^>]+> bf40 sev
# name: ARMv6T2 ARM mode
# as: -march=armv6t2
# source: archv6t2-1.s
# objdump: -dr --prefix-addresses --show-raw-insn
.*: +file format .*arm.*
Disassembly of section .text:
0[0-9a-f]+ <[^>]+> e320f001 yield
0[0-9a-f]+ <[^>]+> e320f002 wfe
0[0-9a-f]+ <[^>]+> e320f003 wfi
0[0-9a-f]+ <[^>]+> e320f004 sev
Supports Markdown
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment