Commit bd244083 authored by Jim Blandy's avatar Jim Blandy
Browse files

* gas/mips/mips.exp: Run the new tests, below.

* gas/mips/elf_e_flags1.d, gas/mips/elf_e_flags2.d,
gas/mips/elf_e_flags3.d, gas/mips/elf_e_flags4.d: New files.
* gas/mips/elf_e_flags.c, gas/mips/elf_e_flags.s: New files.
parent c80f964d
/* This file isn't directly used by the test suite; it uses
elf_e_flags.s. However, I figured it would be nice to provide the
source code from which the .s file was generated.
It was compiled as follows:
mips64-elf-gcc -m4650 -S -O elf_e_flags.c
We use the -m4650 flag to get the 4650-specific 'mul' instruction
in there; the test suite wants to be sure that GAS's -m4650 flag
will indeed cause it to generate the 4650 mul instruction, and not
expand it as a macro. */
int
foo (int a, int b)
{
return (a * b) + 1;
}
int
main ()
{
return 0;
}
.file 1 "elf_e_flags.c"
gcc2_compiled.:
__gnu_compiled_c:
.text
.align 2
.globl foo
.text
.ent foo
foo:
.frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, extra= 0
.mask 0x00000000,0
.fmask 0x00000000,0
mul $2,$4,$5
.set noreorder
.set nomacro
j $31
addu $2,$2,1
.set macro
.set reorder
.end foo
.align 2
.globl main
.text
.ent main
main:
.frame $sp,40,$31 # vars= 0, regs= 1/0, args= 32, extra= 0
.mask 0x80000000,-8
.fmask 0x00000000,0
subu $sp,$sp,40
sd $31,32($sp)
jal __gccmain
move $2,$0
ld $31,32($sp)
#nop
.set noreorder
.set nomacro
j $31
addu $sp,$sp,40
.set macro
.set reorder
.end main
# name: ELF e_flags: nothing special
# source: elf_e_flags.s
# objdump: -fd
.*:.*file format.*mips.*
architecture: mips:4000, flags 0x00000011:
HAS_RELOC, HAS_SYMS
start address 0x0000000000000000
Disassembly of section .text:
0000000000000000 <foo>:
0: 00850019 multu \$a0,\$a1
4: 00001012 mflo \$v0
8: 03e00008 jr \$ra
c: 24420001 addiu \$v0,\$v0,1
0000000000000010 <main>:
10: 27bdffd8 addiu \$sp,\$sp,-40
14: ffbf0020 sd \$ra,32\(\$sp\)
18: 0c000000 jal 0 <foo>
1c: 00000000 nop
20: 0000102d move \$v0,\$zero
24: dfbf0020 ld \$ra,32\(\$sp\)
28: 03e00008 jr \$ra
2c: 27bd0028 addiu \$sp,\$sp,40
# name: ELF e_flags: -m4650
# source: elf_e_flags.s
# as: -m4650
# objdump: -fd
.*:.*file format.*mips.*
architecture: mips:4650, flags 0x00000011:
HAS_RELOC, HAS_SYMS
start address 0x0000000000000000
Disassembly of section .text:
0000000000000000 <foo>:
0: 70851002 mul \$v0,\$a0,\$a1
4: 03e00008 jr \$ra
8: 24420001 addiu \$v0,\$v0,1
000000000000000c <main>:
c: 27bdffd8 addiu \$sp,\$sp,-40
10: ffbf0020 sd \$ra,32\(\$sp\)
14: 0c000000 jal 0 <foo>
18: 00000000 nop
1c: 0000102d move \$v0,\$zero
20: dfbf0020 ld \$ra,32\(\$sp\)
24: 03e00008 jr \$ra
28: 27bd0028 addiu \$sp,\$sp,40
# name: ELF e_flags: -mcpu=4650
# source: elf_e_flags.s
# as: -mcpu=4650
# objdump: -fd
.*:.*file format.*mips.*
architecture: mips:4650, flags 0x00000011:
HAS_RELOC, HAS_SYMS
start address 0x0000000000000000
Disassembly of section .text:
0000000000000000 <foo>:
0: 70851002 mul \$v0,\$a0,\$a1
4: 03e00008 jr \$ra
8: 24420001 addiu \$v0,\$v0,1
000000000000000c <main>:
c: 27bdffd8 addiu \$sp,\$sp,-40
10: ffbf0020 sd \$ra,32\(\$sp\)
14: 0c000000 jal 0 <foo>
18: 00000000 nop
1c: 0000102d move \$v0,\$zero
20: dfbf0020 ld \$ra,32\(\$sp\)
24: 03e00008 jr \$ra
28: 27bd0028 addiu \$sp,\$sp,40
# name: ELF e_flags: -m4650 -mcpu=4650
# source: elf_e_flags.s
# as: -m4650 -mcpu=4650
# objdump: -fd
.*:.*file format.*mips.*
architecture: mips:4650, flags 0x00000011:
HAS_RELOC, HAS_SYMS
start address 0x0000000000000000
Disassembly of section .text:
0000000000000000 <foo>:
0: 70851002 mul \$v0,\$a0,\$a1
4: 03e00008 jr \$ra
8: 24420001 addiu \$v0,\$v0,1
000000000000000c <main>:
c: 27bdffd8 addiu \$sp,\$sp,-40
10: ffbf0020 sd \$ra,32\(\$sp\)
14: 0c000000 jal 0 <foo>
18: 00000000 nop
1c: 0000102d move \$v0,\$zero
20: dfbf0020 ld \$ra,32\(\$sp\)
24: 03e00008 jr \$ra
28: 27bd0028 addiu \$sp,\$sp,40
......@@ -117,4 +117,16 @@ if [istarget mips*-*-*] then {
run_dump_test "mips4650"
run_dump_test "mips4100"
run_dump_test "lineno"
run_dump_test "sync"
# Make sure that -mcpu=FOO and -mFOO are equivalent. Assemble a file
# containing 4650-specific instructions with -m4650 and -mcpu=4650,
# and verify that they're the same. Specifically, we're checking
# that the EF_MIPS_MACH field is set, and that the 4650 'mul'
# instruction does get used. In previous versions of GAS,
# only -mcpu=4650 would set the EF_MIPS_MACH field; -m4650 wouldn't.
run_dump_test "elf_e_flags1"
run_dump_test "elf_e_flags2"
run_dump_test "elf_e_flags3"
run_dump_test "elf_e_flags4"
}
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment