Commit c608c12e authored by Alan Modra's avatar Alan Modra
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P

i386 PIII SIMD support, remove ReverseRegRegmem kludge
tidy a few things in i386 intel mode disassembly
parent 3afcee8e
1999-05-12 Alan Modra <alan@spri.levels.unisa.edu.au>
* gas/i386/opcode.d: Modify callw to suit disasm fix.
* gas/i386/amd.d: Modify a '(bad)' to SIMD instruction.
* gas/i386/amd.s: Pad to multiple of 8
* gas/i386/amd.d: Here too.
* gas/i386/prefix.[sd]: Align with nops
* gas/i386/reloc.[sd]: Here too.
* gas/i386/katmai.[sd]: New for PIII SIMD
* gas/i386/i386.exp: Call it.
1999-05-02 Nick Clifton <nickc@cygnus.com>
* gas/mcore/allinsn.d: Update to match latest assembler
......
......@@ -29,9 +29,12 @@ Disassembly of section .text:
6b: 0f 0f ce 0d [ ]*pi2fd %mm6,%mm1
6f: 0f 0f d7 b7 [ ]*pfmulhrw %mm7,%mm2
73: 2e 0f [ ]*\(bad\)
75: 0f 54 [ ]*\(bad\)
77: c3 [ ]*ret
75: 0f 54 c3 [ ]*andps %xmm3,%xmm0
78: 07 [ ]*pop %es
79: c3 [ ]*ret
7a: 90 [ ]*nop
7b: 90 [ ]*nop
7c: 90 [ ]*nop
7d: 90 [ ]*nop
7e: 90 [ ]*nop
7f: 90 [ ]*nop
......@@ -28,6 +28,5 @@
# Everything's good bar the opcode suffix
.byte 0x2e, 0x0f, 0x0f, 0x54, 0xc3, 0x07, 0xc3
# to make us insensitive to alignment
nop
nop
# Pad out to a good alignment
.byte 0x90,0x90,0x90,0x90,0x90,0x90
......@@ -24,6 +24,7 @@ if [istarget "i*86-*-*"] then {
run_dump_test "opcode"
run_dump_test "prefix"
run_dump_test "amd"
run_dump_test "katmai"
# The reloc and white tests require support for 8 and 16 bit
# relocs, so we only run them for ELF targets.
......
......@@ -526,7 +526,7 @@ Disassembly of section .text:
879: 66 d3 90 90 90 90 90 [ ]*rclw %cl,0x90909090\(%eax\)
880: 66 e5 90 [ ]*in \$0x90,%ax
883: 66 e7 90 [ ]*out %ax,\$0x90
886: 66 e8 8f 90 [ ]*callw (0x)?ffff9919.*
886: 66 e8 8f 90 [ ]*callw (0x)?9919.*
88a: 66 ea 90 90 90 90 [ ]*ljmpw \$0x9090,\$0x9090
890: 66 ed [ ]*in \(%dx\),%ax
892: 66 ef [ ]*out %ax,\(%dx\)
......
......@@ -12,4 +12,4 @@ Disassembly of section .text:
b: 9b df e0 [ ]*fstsw %ax
e: 9b 67 df e0 [ ]*addr16 fstsw %ax
12: f3 67 66 36 a7 [ ]*repz addr16 cmpsw %es:\(%di\),%ss:\(%si\)
...
17: 90 [ ]*nop
......@@ -7,5 +7,5 @@ foo:
addr16 fstsw %ax
addr16 rep cmpsw %es:(%di),%ss:(%si)
# Get a good alignment.
.byte 0
# Get a good alignment.
nop
......@@ -13,3 +13,8 @@ Disassembly of section .text:
12: 69 d2 00 00 00 00 [ ]*imul \$0x0,%edx,%edx 14: R_386_32 .text
18: 9a 00 00 00 00 00 00 [ ]*lcall \$0x0,\$0x0 19: R_386_32 .text
1f: 66 68 00 00 [ ]*pushw \$0x0 21: R_386_16 .text
23: 90 [ ]*nop
24: 90 [ ]*nop
25: 90 [ ]*nop
26: 90 [ ]*nop
27: 90 [ ]*nop
......@@ -6,3 +6,6 @@ foo: mov $foo, %bl
imul $foo, %edx
lcall $0, $foo
pushw $foo
# Pad out to a good alignment
.byte 0x90,0x90,0x90,0x90,0x90
1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
* i386.h (ReverseModrm): Remove all occurences.
(InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
movmskps, pextrw, pmovmskb, maskmovq.
Change NoSuf to FP on all MMX, XMM and AMD insns as these all
ignore the data size prefix.
* i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
Mostly stolen from Doug Ledford <dledford@redhat.com>
Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
* ppc.h (PPC_OPCODE_64_BRIDGE): New.
......
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1999-05-12 Alan Modra <alan@spri.levels.unisa.edu.au>
* i386-dis.c (dis386_intel): Remove macro chars, except for
jEcxz. Change cWtR and cRtd to cW and cR.
(dis386_twobyte_intel): Remove macro chars here too.
(putop): Handle R and W macros for intel mode.
* i386-dis.c (SIMD_Fixup): New function.
(dis386_twobyte_att): Use it on movlps and movhps, and change
Ev to EX on these insns. Change movmskps Ev, XM to Gv, EX.
(dis386_twobyte_intel): Same here.
* i386-dis.c (Av): Remove.
(Ap): remove lptr.
(lptr): Remove.
(OPSIMD): Define.
(OP_SIMD_Suffix): New function.
(OP_DIR): Remove dead code.
(eAX_reg..eDI_reg): Renumber.
(onebyte_has_modrm): Table numbering comments.
(INTERNAL_DISASSEMBLER_ERROR): Move to before print_insn_x86.
(print_insn_x86): Move all prefix oappends to after uses_f3_prefix
checks. Print error on invalid dp->bytemode2. Remove simd_cmp,
and handle SIMD cmp insns in OP_SIMD_Suffix.
(info->bytes_per_line): Bump from 5 to 6.
(OP_None): Remove.
(OP_E): Use INTERNAL_DISASSEMBLER_ERROR. Handle sfence.
(OP_3DNowSuffix): Ensure mnemonic index unsigned.
PIII SIMD support from Doug Ledford <dledford@redhat.com>
* i386-dis.c (XM, EX, None): Define.
(OP_XMM, OP_EX, OP_None): New functions.
(USE_GROUPS, USE_PREFIX_USER_TABLE): Define.
(GRP14): Rename to GRPAMD.
(GRP*): Add USE_GROUPS flag.
(PREGRP*): Define.
(dis386_twobyte_att, dis386_twobyte_intel): Add SIMD insns.
(twobyte_has_modrm): Add SIMD entries.
(twobyte_uses_f3_prefix, simd_cmp_op, prefix_user_table): New.
(grps): Add SIMD insns.
(print_insn_x86): New vars uses_f3_prefix and simd_cmp. Don't
oappend repz if uses_f3_prefix. Add code to handle new groups for
SIMD insns.
From Maciej W. Rozycki <macro@ds2.pg.gda.pl>
* i386-dis.c (dis386_att, dis386_intel): Change 0xE8 call insn
operand from Av to Jv.
1999-05-07 Nick Clifton <nickc@cygnus.com>
* mcore-dis.c (print_insn_mcore): Use .short to display
......
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