Commit d5dcaf1b authored by John Darrington's avatar John Darrington
Browse files

S12Z: Emit RELOC_S12Z_OPR instead of RELOC_EXT24 where appropriate.

When assembling instructions which involve OPR references, emit
RELOC_S12Z_OPR instead of RELOC_EXT24.

bfd/
	* bfd-in2.h [BFD_RELOC_S12Z_OPR]: New reloc.
	* libbfd.h: regen.
	* elf32-s12z.c (eld_s12z_howto_table): R_S12Z_OPR takes non zero
	source field.  (md_apply_fix): Apply final fix
	to BFD_RELOC_S12Z_OPR.
	* reloc.c[BFD_RELOC_S12Z_OPR]: New reloc.

gas/
	* config/tc-s12z.c (emit_opr): Emit BFD_RELOC_S12Z_OPR instead of
	BFD_RELOC_24.
	* testsuite/gas/s12z/opr-indirect-expr.d: Expect R_S12Z_OPR instead
	of R_S12Z_EXT24.
parent 338c923d
2019-01-14 John Darrington <john@darrington.wattle.id.au>
* bfd-in2.h [BFD_RELOC_S12Z_OPR]: New reloc.
* libbfd.h: regen.
* elf32-s12z.c (eld_s12z_howto_table): R_S12Z_OPR takes non zero
source field. (md_apply_fix): Apply final fix
to BFD_RELOC_S12Z_OPR.
* reloc.c[BFD_RELOC_S12Z_OPR]: New reloc.
2019-01-14 Maamoun Tarsha <maamountk@hotmail.com>
PR 20113
......
......@@ -6696,6 +6696,9 @@ assembler and not (currently) written to any object files. */
BFD_RELOC_CKCORE_IRELATIVE,
BFD_RELOC_CKCORE_PCREL_BLOOP_IMM4BY4,
BFD_RELOC_CKCORE_PCREL_BLOOP_IMM12BY4,
/* S12Z relocations. */
BFD_RELOC_S12Z_OPR,
BFD_RELOC_UNUSED };
typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
......
......@@ -119,7 +119,7 @@ static reloc_howto_type elf_s12z_howto_table[] =
shift_addend_reloc,
"R_S12Z_OPR", /* name */
FALSE, /* partial_inplace */
0x00000000, /* src_mask */
0x00ffffff, /* src_mask */
0x00ffffff, /* dst_mask */
FALSE), /* pcrel_offset */
......@@ -232,11 +232,12 @@ struct s12z_reloc_map
static const struct s12z_reloc_map s12z_reloc_map[] =
{
/* bfd reloc val */ /* elf reloc val */
{BFD_RELOC_NONE, R_S12Z_NONE},
{BFD_RELOC_32, R_S12Z_EXT32},
{BFD_RELOC_24, R_S12Z_EXT24},
{BFD_RELOC_16_PCREL, R_S12Z_PCREL_7_15}
/* bfd reloc val */ /* elf reloc val */
{BFD_RELOC_NONE, R_S12Z_NONE},
{BFD_RELOC_32, R_S12Z_EXT32},
{BFD_RELOC_24, R_S12Z_EXT24},
{BFD_RELOC_16_PCREL, R_S12Z_PCREL_7_15},
{BFD_RELOC_S12Z_OPR, R_S12Z_OPR}
};
static reloc_howto_type *
......
......@@ -3320,6 +3320,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_CKCORE_IRELATIVE",
"BFD_RELOC_CKCORE_PCREL_BLOOP_IMM4BY4",
"BFD_RELOC_CKCORE_PCREL_BLOOP_IMM12BY4",
"BFD_RELOC_S12Z_OPR",
"@@overflow: BFD_RELOC_UNUSED@@",
};
#endif
......
......@@ -8052,6 +8052,11 @@ ENUMX
ENUMDOC
C-SKY relocations.
ENUM
BFD_RELOC_S12Z_OPR
ENUMDOC
S12Z relocations.
ENDSENUM
BFD_RELOC_UNUSED
CODE_FRAGMENT
......
2019-01-16 John Darrington <john@darrington.wattle.id.au>
* config/tc-s12z.c (emit_opr): Emit BFD_RELOC_S12Z_OPR instead of
BFD_RELOC_24.
* testsuite/gas/s12z/opr-indirect-expr.d: Expect R_S12Z_OPR instead
of R_S12Z_EXT24.
2019-01-14 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* config/tc-arm.c (arm_ext_v6k_v6t2): Define.
......
......@@ -732,12 +732,17 @@ emit_opr (char *f, const uint8_t *buffer, int n_bytes, expressionS *exp)
number_to_chars_bigendian (f++, buffer[0], 1);
if (exp->X_op != O_absent && exp->X_op != O_constant)
{
fix_new_exp (frag_now,
f - frag_now->fr_literal,
3,
exp,
FALSE,
BFD_RELOC_24);
fixS *fix = fix_new_exp (frag_now,
f - frag_now->fr_literal,
3,
exp,
FALSE,
BFD_RELOC_S12Z_OPR);
/* Some third party tools seem to use the lower bits
of this addend for flags. They don't get added
to the final location. The purpose of these flags
is not known. We simply set it to zero. */
fix->fx_addnumber = 0x00;
}
for (i = 1; i < n_bytes; ++i)
number_to_chars_bigendian (f++, buffer[i], 1);
......@@ -3821,6 +3826,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
bfd_putb16 ((bfd_vma) value, (unsigned char *) where);
break;
case BFD_RELOC_24:
case BFD_RELOC_S12Z_OPR:
bfd_putb24 ((bfd_vma) value, (unsigned char *) where);
break;
case BFD_RELOC_32:
......
......@@ -11,4 +11,4 @@ Disassembly of section .text:
00000000 <.text>:
0: a7 fe 00 00 ld d7, \[1\]
4: 01
2: R_S12Z_EXT24 FOO
2: R_S12Z_OPR FOO
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