2009-12-17  Jeff Johnston  <jjohnstn@redhat.com>

        * COPYING.NEWLIB: Update copyright date.
        * COPYING.LIBGLOSS: Ditto.

	testing if a weak symbol is defined or not, and when it is not,
	consider whether the default value requires a base reloc anyway.

	(def_file_print): Likewise.
	(def_stash_module): Likewise.
	(def_file_add_import): Likewise.

	* Makefile.am (CCFILES): Add timer.cc.
	(HFILES): Add timer.h.
	* configure.ac: Check for sysconf and times.
	* main.cc: include timer.h.
	(main): Use Timer instead of get_run_time.
	* timer.cc: New.
	* timer.h: New.
	* workqueue.cc: include timer.h.
	(Workqueue::find_and_run_task):
	Report user, sys and wall time.
	* Makefile.in: Regenerate.
	* config.in: Regenerate.
	* configure: Regenerate.

        * config/tc-arm.c (do_ldstv4): Do not allow r15 as the destination
        register.
        (do_mrs): Likewise.
        (do_mul): Likewise.

        * arm-dis.c: Add support for %<>ru and %<>rU formats to enforce
        unique register numbers.  Extend support for %<>R format to
        thumb32 and coprocessor instructions.

        * gas/arm/unpredictable.s: Add more unpredictable instructions.
        * gas/arm/unpredictable.d: Add expected disassemblies.

include/elf/
	* ppc.h (R_PPC_RELAX32, R_PPC_RELAX32PC, R_PPC_RELAX32_PLT,
	R_PPC_RELAX32PC_PLT): Delete.
	(R_PPC_RELAX, R_PPC_RELAX_PLT, R_PPC_RELAX_PLTREL24): Define.
bfd/
	* elf32-ppc.c (update_plt_info): Clear sec here when addend is
	less than 32768..
	(ppc_elf_check_relocs): ..rather than doing so here.  Ignore new
	relax relocs.
	(ppc_elf_gc_sweep_hook): Don't segfault when symbol hiding has
	removed plt_entry records.
	(ppc_elf_tls_setup): Handle PIE calls to __tls_get_addr correctly.
	(ppc_elf_tls_optimize): Likewise.  Also dec __tls_get_addr refcount
	when optimizing code using new tlsgd and tlsld marker relocs.
	(ppc_elf_relax_section): Differentiate relaxed PLTREL24 relocs
	from ADDR24 relocs using plt or glink.  Don't clear the addend
	for R_PPC_RELAX_PLTREL24.
	(ppc_elf_relocate_section): Correctly handle addends on relaxed
	PLTREL24 relocs.

	* elf64-ppc.c (ppc64_elf_gc_sweep_hook): Don't abort if symbol
	hiding has nulled out plt.plist.

	* arm.cc (Arm_relobj::scan_sections_for_stubs): Exclude ICF-eliminated
	sections.
	* object.cc (Sized_relobj::do_finalize_local_symbols): Handle
	relaxed input sections.
	* output.cc (Output_section::find_relaxed_input_section): Change
	return type to Output_relaxed_input_section pointer.  Adjust code
	for new type of relaxed_input_section_map_.
	* output.h (Output_section::find_relaxed_input_section): Change
	return type to Output_relaxed_input_section pointer.
	(Output_section::Output_relaxed_input_section_by_input_section_map):
	New type.
	(Output_section::relaxed_input_section_map_): Change type to
	Output_section::Output_relaxed_input_section_by_input_section_map.
	* symtab.cc (Symbol_table::compute_final_value): Handle relaxed
	input section.

gas/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_suffix): Set i.suffix to 0 in
	Intel syntax if size is ignored and b/l/w suffixes are
	illegal.
	(check_byte_reg): Remove byteokintel check.

opcodes/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove ByteOkIntel.

	* i386-opc.h (ByteOkIntel): Removed.
	(i386_opcode_modifier): Remove byteokintel.

	* i386-opc.tbl: Remove ByteOkIntel.
	* i386-tbl.h: Regenerated.

gas/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Replace vex0f, vex0f38,
	vex0f3a, xop08, xop09 and xop0a with vexopcode.

opcodes/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove Vex0F, Vex0F38,
	Vex0F3A, XOP08, XOP09 and XOP0A.  Add VexOpcode.

	* i386-opc.h (Vex0F): Removed.
	(Vex0F38): Likewise.
	(Vex0F3A): Likewise.
	(VexOpcode): New.
	(VEX0F): Likewise.
	(VEX0F38): Likewise.
	(VEX0F3A): Likewise.
	(XOP08): Defined as a macro.
	(XOP09): Likewise.
	(XOP0A): Likewise.
	(i386_opcode_modifier): Remove vex0f, vex0f38, vex0f3a, xop08,
	xop09 and xop0a.  Add vexopcode.

	* i386-opc.tbl: Replace Vex0F with VexOpcode=0, Vex0F38 with
	VexOpcode=1, Vex0F3A with VexOpcode=2, XOP08 with VexOpcode=3,
	XOP09 with VexOpcode=4 and XOP0A with VexOpcode=5.
	* i386-tbl.h: Regenerated.

die immediately to allow a parameter type to be the same subroutine type.

gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_modrm_byte): Check XOP2SOURCES
	instead VEX2SOURCES.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VEX2SOURCES): Renamed to ...
	(XOP2SOURCES): This.

gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_operands): Check vexsources
	instead of vex3sources.
	(build_modrm_byte): Check vexsources instead of vex2sources
	and vex3sources.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove Vex3Sources and
	Vex2Sources.  Add VexSources.

	* i386-opc.h ()Vex2Sources: Removed.
	(Vex3Sources): Likewise.
	(VEX2SOURCES): New.
	(VEX3SOURCES): Likewise.
	(VexSources): Likewise.
	(i386_opcode_modifier): Remove vex2sources and vex3sources.
	Add vexsources.

	* i386-opc.tbl: Replace Vex2Sources with VexSources=1 and
	Vex3Sourceswith VexSources=2.
	* i386-tbl.h: Regenerated.

gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Replace vexw0/vexw1
	with vexw.
	(build_modrm_byte): Likewise.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1.  Add
	VexW.

	* i386-opc.h (VexW0): Removed.
	(VexW1): Likewise.
	(VEXW0): New.
	(VEXW1): Likewise.
	(VexW): Likewise.
	(i386_opcode_modifier): Remove vexw0 and vexw1.  Add vexw.

	* i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with
	Vex=2.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

	* as.h (mempcpy): New.

	* configure.in: Check if mempcpy is declared.
	* configure: Regenerated.
	* config.in: Likewise.

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (VEX_W_3818_P_2_M_0): New.
	(vex_w_table): Add VEX_W_3818_P_2_M_0.
	(mod_table): Use VEX_W_3818_P_2_M_0.

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (vex_w_table): Reformat.

	sections if we are compressing debug sections.

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (VEX_W_382X_P_2_M_0): New.
	(vex_w_table): Add VEX_W_382X_P_2_M_0.
	(mod_table): Use VEX_W_382X_P_2_M_0.

	a version if there is, in fact, a version.

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (vex_w_table): Reformat.

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (USE_VEX_W_TABLE): New.
	(VEX_W_TABLE): Likewise.
	(VEX_W_XXX): Likewise.
	(vex_w_table): Likewise.
	(prefix_table): Use VEX_W_XXX.
	(vex_table): Likewise.
	(vex_len_table): Likewise.
	(mod_table): Likewise.
	(get_valid_dis386): Handle USE_VEX_W_TABLE.

	* i386-opc.tbl: Add VexW0 to AVX instructions where the VEX.W bit
	isn't used.
	* i386-tbl.h: Regenerated.

	* opncls.c (bfd_opnr_iovec): Replace _XXX with XXX_P in
	parameters.

	* tekhex.c (pass_over): Replace eof with is_eof.

gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Use VEX256.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VEX128): New.
	(VEX256): Likewise.

	* machoread.c (macho_symfile_read): Set section size of dsym bfd
	from main bfd.

        * mach-o.h (bfd_mach_o_uuid_command): Remove section field.
        * mach-o.c (bfd_mach_o_scan_read_uuid): Do not create a section
        from this command.

        * machoread.c (macho_check_dsym): Read uuid directly from load command
        instead of from a fake section.

        * machoread.c (macho_symtab_read): Add comments.  Always set
        first_offset.

        * mach-o.c (struct mach_o_section_name_xlat): Add flags field.
        (dwarf_section_names_xlat): Add section flags.
        (text_section_names_xlat): Ditto.
        (data_section_names_xlat): Ditto.
        (bfd_mach_o_convert_section_name_to_bfd): Now return name and section
        flags by reference.
        (bfd_mach_o_make_bfd_section): Use section flags when know, otherwise
        try to guess.

bfd/ChangeLog:

	* opncls.c (bfd_opnr_iovec): Rename parameters to avoid shawdowed
	variable warnings.
	* bfd-in2.h: Regnenerate.

include/ChangeLog:

	* bfdlink.h (struct bfd_link_callbacks): Rename function parameters
	to avoid shadowed variable warnings.
	* dis-asm.h (struct disassemble_info): Ditto.
	(disassemble_init_for_target): Ditto.
	(init_disassemble_info): Ditto.

2009-12-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (vex_len_table): Reformat.

2009-12-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (MOD_VEX_51): Renamed to ...
	(MOD_VEX_50): This.
	(vex_table): Updated.
	(mod_table): Likewise.